Appropriately zero extend registers when a guard fails. #1595
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Previously we handed registers back to AOT with possibly undefined upper bits. As far as we can tell so far, LLVM expects registers to be zero extended [that said, I must admit that I expect that in some cases they should be sign extended, but that's not something I'm sure about]. This commit has the register allocator return a `GuardSnapshot` at each guard in a trace, where we work out what registers would need to be zero extended if that guard fails. When we generate the "get ready for deopt" code, we pass that `GuardSnapshot` back to the register allocator, which generates the necessary zero extension code.
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Previously we handed registers back to AOT with possibly undefined upper bits. As far as we can tell so far, LLVM expects registers to be zero extended [that said, I must admit that I expect that in some cases they should be sign extended, but that's not something I'm sure about].
This commit has the register allocator return a
GuardSnapshotat each guard in a trace, where we work out what registers would need to be zero extended if that guard fails. When we generate the "get ready for deopt" code, we pass thatGuardSnapshotback to the register allocator, which generates the necessary zero extension code.