mpfs_coremmc: MPFS_FPGA_FIC0_CLK defined as config value

tiiuae · Feb 12, 2025 · f76ea76 · f76ea76
1 parent 61280a5
commit f76ea76
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Showing 2 changed files with 7 additions and 1 deletion.
diff --git a/arch/risc-v/src/mpfs/Kconfig b/arch/risc-v/src/mpfs/Kconfig
@@ -442,6 +442,12 @@ config MPFS_COREMMC_IRQNUM
 	range 0 63
 	depends on MPFS_COREMMC
 
+config MPFS_FPGA_FIC0_CLK_FREQ
+	int "FIC0 clk freq"
+	default 125000000
+	---help---
+		Frequency of FPGA FIC0 clock.
+
 config MPFS_TAMPER
 	bool "Tamper detection"
 	default n

diff --git a/arch/risc-v/src/mpfs/mpfs_coremmc.c b/arch/risc-v/src/mpfs/mpfs_coremmc.c
@@ -123,7 +123,7 @@
 
 /* Clocks and timing */
 
-#define MPFS_FPGA_FIC0_CLK                 (125000000)
+#define MPFS_FPGA_FIC0_CLK                 (CONFIG_MPFS_FPGA_FIC0_CLK_FREQ)
 
 #define COREMMC_CMDTIMEOUT                 (100000)
 #define COREMMC_LONGTIMEOUT                (100000000)