Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

IR documentation improvements and improve debug assert #10130

Merged
merged 2 commits into from
Jan 28, 2025
Merged

IR documentation improvements and improve debug assert #10130

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
681c8c8
Cranelift/x64 backend: improve pointer width assert. (#10118)
iwanders Jan 28, 2025
c5f31de
Cranelift/docs: Change pointer width in ir docs to 64 bits (#10118)
iwanders Jan 28, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
7 changes: 6 additions & 1 deletion cranelift/codegen/src/isa/x64/lower.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -230,7 +230,12 @@ fn lower_to_amode(ctx: &mut Lower<Inst>, spec: InsnInput, offset: i32) -> Amode
// We now either have an add that we must materialize, or some other input; as well as the
// final offset.
if let Some(add) = matches_input(ctx, spec, Opcode::Iadd) {
debug_assert_eq!(ctx.output_ty(add, 0), types::I64);
let output_ty = ctx.output_ty(add, 0);
debug_assert_eq!(
output_ty,
types::I64,
"Address width of 64 expected, got {output_ty}"
);
let add_inputs = &[
InsnInput {
insn: add,
Expand Down
10 changes: 5 additions & 5 deletions cranelift/docs/ir.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -37,24 +37,24 @@ float average(const float *array, size_t count)
}
```

Here is the same function compiled into Cranelift IR:
Here is the same function compiled into Cranelift IR (with 64 bit pointers):

```
test verifier

function %average(i32, i32) -> f32 system_v {
function %average(i64, i64) -> f32 system_v {
ss0 = explicit_slot 8 ; Stack slot for `sum`.

block1(v0: i32, v1: i32):
block1(v0: i64, v1: i64):
v2 = f64const 0x0.0
stack_store v2, ss0
brif v1, block2, block5 ; Handle count == 0.

block2:
v3 = iconst.i32 0
v3 = iconst.i64 0
jump block3(v3)

block3(v4: i32):
block3(v4: i64):
v5 = imul_imm v4, 4
v6 = iadd v0, v5
v7 = load.f32 v6 ; array[i]
Expand Down
Loading