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Winch: Add min and max for SIMD floats for x64 with AVX (#10271)
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@jeffcharles
jeffcharles authored Feb 25, 2025
1 parent ef8a282 commit 1f24222
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Showing 11 changed files with 449 additions and 646 deletions.
10 changes: 4 additions & 6 deletions crates/wast-util/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -419,13 +419,9 @@ impl WastTest {
// simd-related failures
"memory64/simd.wast",
"misc_testsuite/simd/canonicalize-nan.wast",
"spec_testsuite/simd_f32x4.wast",
"spec_testsuite/simd_f32x4_pmin_pmax.wast",
"spec_testsuite/simd_f64x2.wast",
"spec_testsuite/simd_f64x2_pmin_pmax.wast",
"spec_testsuite/simd_load.wast",
"spec_testsuite/simd_load_zero.wast",
"spec_testsuite/simd_splat.wast",
];

if unsupported.iter().any(|part| self.path.ends_with(part)) {
Expand All @@ -445,14 +441,14 @@ impl WastTest {
"misc_testsuite/simd/issue6725-no-egraph-panic.wast",
"misc_testsuite/simd/replace-lane-preserve.wast",
"misc_testsuite/simd/spillslot-size-fuzzbug.wast",
"misc_testsuite/winch/_simd_load.wast",
"misc_testsuite/winch/_simd_splat.wast",
"spec_testsuite/simd_align.wast",
"spec_testsuite/simd_boolean.wast",
"spec_testsuite/simd_conversions.wast",
"spec_testsuite/simd_f32x4.wast",
"spec_testsuite/simd_f32x4_arith.wast",
"spec_testsuite/simd_f32x4_cmp.wast",
"spec_testsuite/simd_f32x4_rounding.wast",
"spec_testsuite/simd_f64x2.wast",
"spec_testsuite/simd_f64x2_arith.wast",
"spec_testsuite/simd_f64x2_cmp.wast",
"spec_testsuite/simd_f64x2_rounding.wast",
Expand All @@ -463,8 +459,10 @@ impl WastTest {
"spec_testsuite/simd_i8x16_arith2.wast",
"spec_testsuite/simd_i8x16_cmp.wast",
"spec_testsuite/simd_int_to_int_extend.wast",
"spec_testsuite/simd_load.wast",
"spec_testsuite/simd_load_extend.wast",
"spec_testsuite/simd_load_splat.wast",
"spec_testsuite/simd_splat.wast",
"spec_testsuite/simd_store16_lane.wast",
"spec_testsuite/simd_store32_lane.wast",
"spec_testsuite/simd_store64_lane.wast",
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49 changes: 49 additions & 0 deletions tests/disas/winch/x64/f32x4_max/const_avx.wat
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@@ -0,0 +1,49 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f32x4.max (v128.const f32x4 3 2 1 0) (v128.const f32x4 0 1 2 3))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x68
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x3c(%rip), %xmm0
;; movdqu 0x44(%rip), %xmm1
;; vmaxps %xmm0, %xmm1, %xmm15
;; vmaxps %xmm1, %xmm0, %xmm1
;; vxorps %xmm1, %xmm15, %xmm1
;; vorps %xmm1, %xmm15, %xmm0
;; vsubps %xmm1, %xmm0, %xmm1
;; vcmpunordps %xmm0, %xmm0, %xmm0
;; vpsrld $0xa, %xmm0, %xmm0
;; vandnps %xmm1, %xmm0, %xmm1
;; movdqa %xmm1, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 68: ud2
;; 6a: addb %al, (%rax)
;; 6c: addb %al, (%rax)
;; 6e: addb %al, (%rax)
;; 70: addb %al, (%rax)
;; 72: addb %al, (%rax)
;; 74: addb %al, (%rax)
;; 76: cmpb $0, (%rdi)
;; 79: addb %al, (%rax)
;; 7b: addb %al, (%rax)
;; 7e: addb %al, (%rax)
;; 82: addb %al, (%rax)
;; 86: addb %al, (%rax)
;; 89: addb %al, 0x3f(%rax)
50 changes: 50 additions & 0 deletions tests/disas/winch/x64/f32x4_min/const_avx.wat
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@@ -0,0 +1,50 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f32x4.min (v128.const f32x4 3 2 1 0) (v128.const f32x4 0 1 2 3))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x64
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x3c(%rip), %xmm0
;; movdqu 0x44(%rip), %xmm1
;; vminps %xmm0, %xmm1, %xmm15
;; vminps %xmm1, %xmm0, %xmm1
;; vorps %xmm1, %xmm15, %xmm1
;; vcmpunordps %xmm1, %xmm0, %xmm0
;; vorps %xmm1, %xmm0, %xmm1
;; vpsrld $0xa, %xmm0, %xmm0
;; vandnps %xmm1, %xmm0, %xmm1
;; movdqa %xmm1, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 64: ud2
;; 66: addb %al, (%rax)
;; 68: addb %al, (%rax)
;; 6a: addb %al, (%rax)
;; 6c: addb %al, (%rax)
;; 6e: addb %al, (%rax)
;; 70: addb %al, (%rax)
;; 72: addb %al, (%rax)
;; 74: addb %al, (%rax)
;; 76: cmpb $0, (%rdi)
;; 79: addb %al, (%rax)
;; 7b: addb %al, (%rax)
;; 7e: addb %al, (%rax)
;; 82: addb %al, (%rax)
;; 86: addb %al, (%rax)
;; 89: addb %al, 0x3f(%rax)
55 changes: 55 additions & 0 deletions tests/disas/winch/x64/f64x2_max/const_avx.wat
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@@ -0,0 +1,55 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f64x2.max (v128.const i64x2 1 0) (v128.const i64x2 0 1))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x68
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x3c(%rip), %xmm0
;; movdqu 0x44(%rip), %xmm1
;; vmaxpd %xmm0, %xmm1, %xmm15
;; vmaxpd %xmm1, %xmm0, %xmm1
;; vxorpd %xmm1, %xmm15, %xmm1
;; vorpd %xmm1, %xmm15, %xmm0
;; vsubpd %xmm1, %xmm0, %xmm1
;; vcmpunordpd %xmm0, %xmm0, %xmm0
;; vpsrlq $0xd, %xmm0, %xmm0
;; vandnpd %xmm1, %xmm0, %xmm1
;; movdqa %xmm1, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 68: ud2
;; 6a: addb %al, (%rax)
;; 6c: addb %al, (%rax)
;; 6e: addb %al, (%rax)
;; 70: addb %al, (%rax)
;; 72: addb %al, (%rax)
;; 74: addb %al, (%rax)
;; 76: addb %al, (%rax)
;; 78: addl %eax, (%rax)
;; 7a: addb %al, (%rax)
;; 7c: addb %al, (%rax)
;; 7e: addb %al, (%rax)
;; 80: addl %eax, (%rax)
;; 82: addb %al, (%rax)
;; 84: addb %al, (%rax)
;; 86: addb %al, (%rax)
;; 88: addb %al, (%rax)
;; 8a: addb %al, (%rax)
;; 8c: addb %al, (%rax)
;; 8e: addb %al, (%rax)
56 changes: 56 additions & 0 deletions tests/disas/winch/x64/f64x2_min/const_avx.wat
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@@ -0,0 +1,56 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f64x2.min (v128.const i64x2 1 0) (v128.const i64x2 0 1))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x64
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x3c(%rip), %xmm0
;; movdqu 0x44(%rip), %xmm1
;; vminpd %xmm0, %xmm1, %xmm15
;; vminpd %xmm1, %xmm0, %xmm1
;; vorpd %xmm1, %xmm15, %xmm1
;; vcmpunordpd %xmm1, %xmm0, %xmm0
;; vorpd %xmm1, %xmm0, %xmm1
;; vpsrlq $0xd, %xmm0, %xmm0
;; vandnpd %xmm1, %xmm0, %xmm1
;; movdqa %xmm1, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 64: ud2
;; 66: addb %al, (%rax)
;; 68: addb %al, (%rax)
;; 6a: addb %al, (%rax)
;; 6c: addb %al, (%rax)
;; 6e: addb %al, (%rax)
;; 70: addb %al, (%rax)
;; 72: addb %al, (%rax)
;; 74: addb %al, (%rax)
;; 76: addb %al, (%rax)
;; 78: addl %eax, (%rax)
;; 7a: addb %al, (%rax)
;; 7c: addb %al, (%rax)
;; 7e: addb %al, (%rax)
;; 80: addl %eax, (%rax)
;; 82: addb %al, (%rax)
;; 84: addb %al, (%rax)
;; 86: addb %al, (%rax)
;; 88: addb %al, (%rax)
;; 8a: addb %al, (%rax)
;; 8c: addb %al, (%rax)
;; 8e: addb %al, (%rax)
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