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add retry for stlink to prevent transfer error
1 parent 975fe95 commit 8d85d0e

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+13
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pyocd/probe/stlink/stlink.py

+13-2
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,8 @@
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from enum import Enum
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from typing import (List, Optional, Sequence, Tuple, Union)
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import usb.core
24+
import time
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from .constants import (Commands, Status, SWD_FREQ_MAP, JTAG_FREQ_MAP)
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from ...core import exceptions
@@ -470,11 +472,20 @@ def _write_mem(self, addr: int, data: Sequence[int], memcmd: int, maxtx: int, ap
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def read_mem32(self, addr: int, size: int, apsel: int, csw: int):
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assert (addr & 0x3) == 0 and (size & 0x3) == 0, "address and size must be word aligned"
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return self._read_mem(addr, size, Commands.JTAG_READMEM_32BIT, self.MAXIMUM_TRANSFER_SIZE, apsel, csw)
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for attempt in range(10):
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try:
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return self._read_mem(addr, size, Commands.JTAG_READMEM_32BIT, self.MAXIMUM_TRANSFER_SIZE, apsel, csw)
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except:
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time.sleep(0.1)
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def write_mem32(self, addr: int, data: Sequence[int], apsel: int, csw: int):
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assert (addr & 0x3) == 0 and (len(data) & 3) == 0, "address and size must be word aligned"
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self._write_mem(addr, data, Commands.JTAG_WRITEMEM_32BIT, self.MAXIMUM_TRANSFER_SIZE, apsel, csw)
483+
for attempt in range(10):
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try:
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self._write_mem(addr, data, Commands.JTAG_WRITEMEM_32BIT, self.MAXIMUM_TRANSFER_SIZE, apsel, csw)
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return
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except:
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time.sleep(0.1)
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def read_mem16(self, addr: int, size: int, apsel: int, csw: int):
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assert (addr & 0x1) == 0 and (size & 0x1) == 0, "address and size must be half-word aligned"

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