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These CSR's are only implemented in that they will return 0 if read; Currently the MHPCOUNTER[13-31] can also be read and return 0. Pull request 167 will fix that.
I believe that rather than update the documentation to match these partial implementations, we should remove these partial implementation.
mconfigptr must be implemented, but it may be zero to indicate the configuration data structure
does not exist or that an alternative mechanism must be used to locate it.
and
In systems with U-mode, the mcounteren must be implemented, but all fields are WARL and may
be read-only zero, indicating reads to the corresponding counter will cause an illegal instruction
exception when executing in a less-privileged mode. In systems without U-mode, the mcounteren
register should not exist.
and
Register menvcfgh does not exist when MXLEN=64.
If U-mode is not supported, then registers menvcfg and menvcfgh do not exist.
and
Defined the mandatory RV32-only CSR mstatush, which contains most of the same fields as the upper 32 bits of RV64’s mstatus.
So the implementations of mconfigptr, mcounteren, menvcfgh and mstatush must not be removed, assuming U mode is present. But I feel they should be documented, otherwise it appears mandatory CSRs are missing!
Task Description
CV32E20 documentation makes no mention of the the following CSRs that are implemented:
Note: this is an addon to task #153, which mentions only the missing documentation for the mcounteren CSR.
Description of Done
Update of the documentation.
Associated PRs
No response
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