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Makefile SVG
1 parent bc00698 commit 096f62a

33 files changed

+5605
-73
lines changed

flashing_led/Makefile

+10-1
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ all:
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@$(MAKE) route $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
2020
@$(MAKE) generate $(MAKE_OPT)
2121
@$(MAKE) flash $(MAKE_OPT) && echo -en "$(BLUEBOLD)==== Done ====$(NC)\n"
22+
-$(MAKE) svg $(MAKE_OPT)
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2324
clean:
2425
@echo -en "$(BLUEBOLD)==== Cleaning... ====$(NC)\n"
@@ -30,7 +31,7 @@ simulate:
3031

3132
synth: # Synthesize the design
3233
@echo -en "$(BLUEBOLD)==== Synthesizing... ====$(NC)\n"
33-
yosys -m $(GHDL) -p '$(GHDL) $(PRIMARY); synth_ice40 -json $(PRIMARY).json' $(ERR_STREAM)
34+
yosys -p '$(GHDL) $(PRIMARY); synth_ice40 -json $(PRIMARY).json' $(ERR_STREAM)
3435

3536
route: # P&R specifically for upduino
3637
@echo -en "$(BLUEBOLD)==== Routing... ====$(NC)\n"
@@ -74,3 +75,11 @@ help:
7475
@echo "run 'make error' or 'make warning' to view errors and warnings about your last 'make all'"
7576
@echo "run 'make clean' to delete build and log files that are generated by 'make all'"
7677
@echo "run 'make simulate/synth/route/generate/flash' to run that specific cmd from 'make all'"
78+
79+
svg:
80+
@$(MAKE) clean $(MAKE_OPT)
81+
@$(MAKE) simulate $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
82+
@echo -en "$(BLUEBOLD)==== Drawing... ====$(NC)\n"
83+
yosys -p "ghdl $(PRIMARY); prep -top $(PRIMARY); write_json svg.json" $(ERR_STREAM)
84+
sed -i 's/"top": "00000000000000000000000000000001"/"top": 1/g' svg.json $(ERR_STREAM)
85+
netlistsvg svg.json -o $(PRIMARY).svg $(ERR_STREAM)

flashing_led/README.md

+2
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,8 @@
22

33
This project flashes the built-in LED of the Upduino.
44

5+
![](./top.svg)
6+
57
TODO:
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- brightness control
79
- push button on/off

flashing_led/top.svg

+124
Loading

spi/Makefile

+13-9
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,10 @@
1-
# change this to match your GHDL installation
21
GHDL=ghdl
3-
# change this to match your primary file
42
PRIMARY=top
5-
# change this to match your file extension, ie .vhdl or .vhd
63
VHDL_EXT=vhdl
7-
# name of the log file where build information is stored
84
LOG_FILE=build.log
9-
10-
VERSION=0.1
115
ERR_STREAM=>> $(LOG_FILE) 2>> $(LOG_FILE)
126
MAKE_OPT=--no-print-directory
7+
138
REDBOLD=\e[1;31m
149
BLUEBOLD=\e[1;36m
1510
NC=\033[0m
@@ -20,22 +15,23 @@ NC=\033[0m
2015
all:
2116
@$(MAKE) clean $(MAKE_OPT)
2217
@$(MAKE) simulate $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
23-
@$(MAKE) synth $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
18+
@$(MAKE) synth $(MAKE_OPT)
2419
@$(MAKE) route $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
2520
@$(MAKE) generate $(MAKE_OPT)
2621
@$(MAKE) flash $(MAKE_OPT) && echo -en "$(BLUEBOLD)==== Done ====$(NC)\n"
22+
-$(MAKE) svg $(MAKE_OPT)
2723

2824
clean:
2925
@echo -en "$(BLUEBOLD)==== Cleaning... ====$(NC)\n"
3026
rm -rf *.bin *.asc *.json *.cf $(LOG_FILE) && touch $(LOG_FILE)
3127

3228
simulate:
33-
@echo -en "$(BLUEBOLD)==== Analyzing... ====$(NC)\n"
29+
@echo -en "$(BLUEBOLD)==== Simulating... ====$(NC)\n"
3430
$(GHDL) -a *.$(VHDL_EXT) $(ERR_STREAM)
3531

3632
synth: # Synthesize the design
3733
@echo -en "$(BLUEBOLD)==== Synthesizing... ====$(NC)\n"
38-
yosys -m $(GHDL) -p '$(GHDL) $(PRIMARY); synth_ice40 -json $(PRIMARY).json' $(ERR_STREAM)
34+
yosys -p '$(GHDL) $(PRIMARY); synth_ice40 -json $(PRIMARY).json' $(ERR_STREAM)
3935

4036
route: # P&R specifically for upduino
4137
@echo -en "$(BLUEBOLD)==== Routing... ====$(NC)\n"
@@ -79,3 +75,11 @@ help:
7975
@echo "run 'make error' or 'make warning' to view errors and warnings about your last 'make all'"
8076
@echo "run 'make clean' to delete build and log files that are generated by 'make all'"
8177
@echo "run 'make simulate/synth/route/generate/flash' to run that specific cmd from 'make all'"
78+
79+
svg:
80+
@$(MAKE) clean $(MAKE_OPT)
81+
@$(MAKE) simulate $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
82+
@echo -en "$(BLUEBOLD)==== Drawing... ====$(NC)\n"
83+
yosys -p "ghdl $(PRIMARY); prep -top $(PRIMARY); write_json svg.json" $(ERR_STREAM)
84+
sed -i 's/"top": "00000000000000000000000000000001"/"top": 1/g' svg.json $(ERR_STREAM)
85+
netlistsvg svg.json -o $(PRIMARY).svg $(ERR_STREAM)

spi/README.md

+1
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@ Files:
1515
- Makefile: compile and flash your project, see `make help` for usage info
1616
- test.vhdl: your other VHDL code
1717

18+
![](./top.svg)
1819

1920
```
2021
///////////////// Statistics: /////////////////

template/Makefile

+13-9
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,10 @@
1-
# change this to match your GHDL installation
21
GHDL=ghdl
3-
# change this to match your primary file
42
PRIMARY=top
5-
# change this to match your file extension, ie .vhdl or .vhd
63
VHDL_EXT=vhdl
7-
# name of the log file where build information is stored
84
LOG_FILE=build.log
9-
10-
VERSION=0.1
115
ERR_STREAM=>> $(LOG_FILE) 2>> $(LOG_FILE)
126
MAKE_OPT=--no-print-directory
7+
138
REDBOLD=\e[1;31m
149
BLUEBOLD=\e[1;36m
1510
NC=\033[0m
@@ -20,22 +15,23 @@ NC=\033[0m
2015
all:
2116
@$(MAKE) clean $(MAKE_OPT)
2217
@$(MAKE) simulate $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
23-
@$(MAKE) synth $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
18+
@$(MAKE) synth $(MAKE_OPT)
2419
@$(MAKE) route $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
2520
@$(MAKE) generate $(MAKE_OPT)
2621
@$(MAKE) flash $(MAKE_OPT) && echo -en "$(BLUEBOLD)==== Done ====$(NC)\n"
22+
-$(MAKE) svg $(MAKE_OPT)
2723

2824
clean:
2925
@echo -en "$(BLUEBOLD)==== Cleaning... ====$(NC)\n"
3026
rm -rf *.bin *.asc *.json *.cf $(LOG_FILE) && touch $(LOG_FILE)
3127

3228
simulate:
33-
@echo -en "$(BLUEBOLD)==== Analyzing... ====$(NC)\n"
29+
@echo -en "$(BLUEBOLD)==== Simulating... ====$(NC)\n"
3430
$(GHDL) -a *.$(VHDL_EXT) $(ERR_STREAM)
3531

3632
synth: # Synthesize the design
3733
@echo -en "$(BLUEBOLD)==== Synthesizing... ====$(NC)\n"
38-
yosys -m $(GHDL) -p '$(GHDL) $(PRIMARY); synth_ice40 -json $(PRIMARY).json' $(ERR_STREAM)
34+
yosys -p '$(GHDL) $(PRIMARY); synth_ice40 -json $(PRIMARY).json' $(ERR_STREAM)
3935

4036
route: # P&R specifically for upduino
4137
@echo -en "$(BLUEBOLD)==== Routing... ====$(NC)\n"
@@ -79,3 +75,11 @@ help:
7975
@echo "run 'make error' or 'make warning' to view errors and warnings about your last 'make all'"
8076
@echo "run 'make clean' to delete build and log files that are generated by 'make all'"
8177
@echo "run 'make simulate/synth/route/generate/flash' to run that specific cmd from 'make all'"
78+
79+
svg:
80+
@$(MAKE) clean $(MAKE_OPT)
81+
@$(MAKE) simulate $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
82+
@echo -en "$(BLUEBOLD)==== Drawing... ====$(NC)\n"
83+
yosys -p "ghdl $(PRIMARY); prep -top $(PRIMARY); write_json svg.json" $(ERR_STREAM)
84+
sed -i 's/"top": "00000000000000000000000000000001"/"top": 1/g' svg.json $(ERR_STREAM)
85+
netlistsvg svg.json -o $(PRIMARY).svg $(ERR_STREAM)

template/README.md

+1
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@ Files:
1515
- Makefile: compile and flash your project, see `make help` for usage info
1616
- test.vhdl: your other VHDL code
1717

18+
![](./top.svg)
1819

1920
```
2021
///////////////// Statistics: /////////////////

template/test.vhdl

-15
This file was deleted.

template/top.svg

+35
Loading

tetris_anim/Makefile

+10-1
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ all:
1919
@$(MAKE) route $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
2020
@$(MAKE) generate $(MAKE_OPT)
2121
@$(MAKE) flash $(MAKE_OPT) && echo -en "$(BLUEBOLD)==== Done ====$(NC)\n"
22+
-$(MAKE) svg $(MAKE_OPT)
2223

2324
clean:
2425
@echo -en "$(BLUEBOLD)==== Cleaning... ====$(NC)\n"
@@ -30,7 +31,7 @@ simulate:
3031

3132
synth: # Synthesize the design
3233
@echo -en "$(BLUEBOLD)==== Synthesizing... ====$(NC)\n"
33-
yosys -m $(GHDL) -p '$(GHDL) $(PRIMARY); synth_ice40 -json $(PRIMARY).json' $(ERR_STREAM)
34+
yosys -p '$(GHDL) $(PRIMARY); synth_ice40 -json $(PRIMARY).json' $(ERR_STREAM)
3435

3536
route: # P&R specifically for upduino
3637
@echo -en "$(BLUEBOLD)==== Routing... ====$(NC)\n"
@@ -74,3 +75,11 @@ help:
7475
@echo "run 'make error' or 'make warning' to view errors and warnings about your last 'make all'"
7576
@echo "run 'make clean' to delete build and log files that are generated by 'make all'"
7677
@echo "run 'make simulate/synth/route/generate/flash' to run that specific cmd from 'make all'"
78+
79+
svg:
80+
@$(MAKE) clean $(MAKE_OPT)
81+
@$(MAKE) simulate $(MAKE_OPT) || $(MAKE) all_err $(MAKE_OPT)
82+
@echo -en "$(BLUEBOLD)==== Drawing... ====$(NC)\n"
83+
yosys -p "ghdl $(PRIMARY); prep -top $(PRIMARY); write_json svg.json" $(ERR_STREAM)
84+
sed -i 's/"top": "00000000000000000000000000000001"/"top": 1/g' svg.json $(ERR_STREAM)
85+
netlistsvg svg.json -o $(PRIMARY).svg $(ERR_STREAM)

tetris_anim/README.md

+2
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,5 @@
11
## tetris_anim
22

33
A short tetris animation displayed on an 8x8 LED array
4+
5+
![](./top.svg)

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