From 002b298862aa7f38b98552376885df53f43e76c0 Mon Sep 17 00:00:00 2001 From: brendabrandy Date: Tue, 11 Mar 2025 16:19:58 -0700 Subject: [PATCH] Suppress unimplemented MSR related warnings When using bhyve on x86, rdmsr and wrmsr emits a lot of warnings when dealing with unimplemented MSR. An option x86.verbosemsr is created to control these warnings. By default, the MSR related warnings are suppressed to avoid spamming the console. Sponsored by: Netflix --- usr.sbin/bhyve/amd64/bhyverun_machdep.c | 1 + usr.sbin/bhyve/amd64/vmexit.c | 12 ++++++++---- usr.sbin/bhyve/bhyve_config.5 | 5 +++++ 3 files changed, 14 insertions(+), 4 deletions(-) diff --git a/usr.sbin/bhyve/amd64/bhyverun_machdep.c b/usr.sbin/bhyve/amd64/bhyverun_machdep.c index d51ad3a5fc0532..85af124b55360b 100644 --- a/usr.sbin/bhyve/amd64/bhyverun_machdep.c +++ b/usr.sbin/bhyve/amd64/bhyverun_machdep.c @@ -63,6 +63,7 @@ bhyve_init_config(void) set_config_bool("acpi_tables_in_memory", true); set_config_value("memory.size", "256M"); set_config_bool("x86.strictmsr", true); + set_config_bool("x86.verbosemsr", false); set_config_value("lpc.fwcfg", "bhyve"); } diff --git a/usr.sbin/bhyve/amd64/vmexit.c b/usr.sbin/bhyve/amd64/vmexit.c index e0b9aec2d17a6c..fae9c5f1667187 100644 --- a/usr.sbin/bhyve/amd64/vmexit.c +++ b/usr.sbin/bhyve/amd64/vmexit.c @@ -107,8 +107,10 @@ vmexit_rdmsr(struct vmctx *ctx __unused, struct vcpu *vcpu, val = 0; error = emulate_rdmsr(vcpu, vme->u.msr.code, &val); if (error != 0) { - EPRINTLN("rdmsr to register %#x on vcpu %d", - vme->u.msr.code, vcpu_id(vcpu)); + if (get_config_bool("x86.strictmsr") || get_config_bool("x86.verbosemsr")) { + EPRINTLN("rdmsr to register %#x on vcpu %d", + vme->u.msr.code, vcpu_id(vcpu)); + } if (get_config_bool("x86.strictmsr")) { vm_inject_gp(vcpu); return (VMEXIT_CONTINUE); @@ -137,8 +139,10 @@ vmexit_wrmsr(struct vmctx *ctx __unused, struct vcpu *vcpu, error = emulate_wrmsr(vcpu, vme->u.msr.code, vme->u.msr.wval); if (error != 0) { - EPRINTLN("wrmsr to register %#x(%#lx) on vcpu %d", - vme->u.msr.code, vme->u.msr.wval, vcpu_id(vcpu)); + if (get_config_bool("x86.strictmsr") || get_config_bool("x86.verbosemsr")) { + EPRINTLN("wrmsr to register %#x(%#lx) on vcpu %d", + vme->u.msr.code, vme->u.msr.wval, vcpu_id(vcpu)); + } if (get_config_bool("x86.strictmsr")) { vm_inject_gp(vcpu); return (VMEXIT_CONTINUE); diff --git a/usr.sbin/bhyve/bhyve_config.5 b/usr.sbin/bhyve/bhyve_config.5 index 3f9d9130787bb6..3dd24ca5fe692c 100644 --- a/usr.sbin/bhyve/bhyve_config.5 +++ b/usr.sbin/bhyve/bhyve_config.5 @@ -240,6 +240,11 @@ By default, writes are ignored and reads return all bits set. Inject a general protection fault if a guest accesses a Model Specific Register (MSR) that is not emulated. If this is false, writes are ignored and reads return zero. +.It Va x86.verbosemsr Ta bool Ta false Ta +Enable verbose MSR print out. When this option is true, +messages related to reading from (rdmsr) and writing to (wrmsr) +MSRs on virtual CPUs will be printed out. This can be useful for +debugging purposes. .It Va x86.vmexit_on_hlt Ta bool Ta false Ta Force a VM exit when a guest CPU executes the .Dv HLT