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nascsRadxaYuntian
nascs
and
RadxaYuntian
committedFeb 29, 2024
platform: add radxa rock pi e
Signed-off-by: Nascs <[email protected]> Co-authored-by: ZHANG Yuntian <[email protected]>
1 parent 258bfcf commit 3f6990d

10 files changed

+290
-0
lines changed
 

‎README.md

+1
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,7 @@ ARM
5252
* [Radxa ROCK 3C](../master/docs/radxa_rock_3c.md)
5353
* [Radxa ROCK 5A](../master/docs/radxa_rock_5a.md)
5454
* [Radxa ROCK 5B](../master/docs/radxa_rock_5b.md)
55+
* [Radxa ROCK Pi E](../master/docs/radxa_rock_pi_e.md)
5556
* [Radxa CM5 IO](../master/docs/radxa_cm5_io.md)
5657
* [Rock Pi 4](../master/docs/rockpi4.md)
5758
* [Orange Pi Prime](../master/docs/orange_pi_prime.md)

‎api/mraa/types.h

+33
Original file line numberDiff line numberDiff line change
@@ -79,6 +79,7 @@ typedef enum {
7979
MRAA_RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
8080
MRAA_RADXA_ROCK_3A = 35, /**< Radxa ROCK 3 Model A */
8181
MRAA_RADXA_E25 = 36, /**< Radxa E25 */
82+
MRAA_RADXA_ROCK_PI_E = 37, /**< Radxa ROCK PI E */
8283

8384
// USB platform extenders start at 256
8485
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
@@ -474,6 +475,38 @@ typedef enum {
474475
MRAA_ROCKPI4_PIN40 = 40
475476
} mraa_rockpi4_wiring_t;
476477

478+
/**
479+
* Radxa ROCK Pi E GPIO number enum
480+
*/
481+
typedef enum {
482+
MRAA_RADXA_ROCK_PI_E_PIN3 = 3,
483+
MRAA_RADXA_ROCK_PI_E_PIN5 = 5,
484+
MRAA_RADXA_ROCK_PI_E_PIN7 = 7,
485+
MRAA_RADXA_ROCK_PI_E_PIN8 = 8,
486+
MRAA_RADXA_ROCK_PI_E_PIN10 = 10,
487+
MRAA_RADXA_ROCK_PI_E_PIN11 = 11,
488+
MRAA_RADXA_ROCK_PI_E_PIN12 = 12,
489+
MRAA_RADXA_ROCK_PI_E_PIN13 = 13,
490+
MRAA_RADXA_ROCK_PI_E_PIN15 = 15,
491+
MRAA_RADXA_ROCK_PI_E_PIN19 = 19,
492+
MRAA_RADXA_ROCK_PI_E_PIN21 = 21,
493+
MRAA_RADXA_ROCK_PI_E_PIN22 = 22,
494+
MRAA_RADXA_ROCK_PI_E_PIN23 = 23,
495+
MRAA_RADXA_ROCK_PI_E_PIN24 = 24,
496+
MRAA_RADXA_ROCK_PI_E_PIN26 = 26,
497+
MRAA_RADXA_ROCK_PI_E_PIN27 = 27,
498+
MRAA_RADXA_ROCK_PI_E_PIN28 = 28,
499+
MRAA_RADXA_ROCK_PI_E_PIN29 = 29,
500+
MRAA_RADXA_ROCK_PI_E_PIN31 = 31,
501+
MRAA_RADXA_ROCK_PI_E_PIN32 = 32,
502+
MRAA_RADXA_ROCK_PI_E_PIN33 = 33,
503+
MRAA_RADXA_ROCK_PI_E_PIN35 = 35,
504+
MRAA_RADXA_ROCK_PI_E_PIN36 = 36,
505+
MRAA_RADXA_ROCK_PI_E_PIN37 = 37,
506+
MRAA_RADXA_ROCK_PI_E_PIN38 = 38,
507+
MRAA_RADXA_ROCK_PI_E_PIN40 = 40
508+
} mraa_radxa_rock_pi_e_wiring_t;
509+
477510
/**
478511
* Raspberry PI Wiring compatible numbering enum
479512
*/

‎api/mraa/types.hpp

+33
Original file line numberDiff line numberDiff line change
@@ -73,6 +73,7 @@ typedef enum {
7373
RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
7474
RADXA_ROCK_3A = 35, /**< Radxa ROCK 3 Model A */
7575
RADXA_E25 = 36, /**< Radxa E25 */
76+
RADXA_ROCK_PI_E = 37, /**< Radxa ROCK Pi E */
7677

7778
FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
7879

@@ -465,6 +466,38 @@ typedef enum {
465466
ROCKPI4_PIN40 = 40
466467
} RockPi4Wiring;
467468

469+
/**
470+
* Radxa ROCK PI E GPIO numbering enum
471+
*/
472+
typedef enum {
473+
RADXA_ROCK_PI_E_PIN3 = 3,
474+
RADXA_ROCK_PI_E_PIN5 = 5,
475+
RADXA_ROCK_PI_E_PIN7 = 7,
476+
RADXA_ROCK_PI_E_PIN8 = 8,
477+
RADXA_ROCK_PI_E_PIN10 = 10,
478+
RADXA_ROCK_PI_E_PIN11 = 11,
479+
RADXA_ROCK_PI_E_PIN12 = 12,
480+
RADXA_ROCK_PI_E_PIN13 = 13,
481+
RADXA_ROCK_PI_E_PIN15 = 15,
482+
RADXA_ROCK_PI_E_PIN19 = 19,
483+
RADXA_ROCK_PI_E_PIN21 = 21,
484+
RADXA_ROCK_PI_E_PIN22 = 22,
485+
RADXA_ROCK_PI_E_PIN23 = 23,
486+
RADXA_ROCK_PI_E_PIN24 = 24,
487+
RADXA_ROCK_PI_E_PIN26 = 26,
488+
RADXA_ROCK_PI_E_PIN27 = 27,
489+
RADXA_ROCK_PI_E_PIN28 = 28,
490+
RADXA_ROCK_PI_E_PIN29 = 29,
491+
RADXA_ROCK_PI_E_PIN31 = 31,
492+
RADXA_ROCK_PI_E_PIN32 = 32,
493+
RADXA_ROCK_PI_E_PIN33 = 33,
494+
RADXA_ROCK_PI_E_PIN35 = 35,
495+
RADXA_ROCK_PI_E_PIN36 = 36,
496+
RADXA_ROCK_PI_E_PIN37 = 37,
497+
RADXA_ROCK_PI_E_PIN38 = 38,
498+
RADXA_ROCK_PI_E_PIN40 = 40
499+
} RadxaRockPiEWiring;
500+
468501
/**
469502
* Raspberry PI Wiring compatible numbering enum
470503
*/

‎docs/index.java.md

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@@ -62,6 +62,7 @@ Specific platform information for supported platforms is documented here:
6262
- @ref radxa_rock_3c
6363
- @ref radxa_rock_5a
6464
- @ref radxa_rock_5b
65+
- @ref radxa_rock_pi_e
6566
- @ref rockpi4
6667

6768
## DEBUGGING

‎docs/index.md

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@@ -70,6 +70,7 @@ Specific platform information for supported platforms is documented here:
7070
- @ref radxa_rock_3c
7171
- @ref radxa_rock_5a
7272
- @ref radxa_rock_5b
73+
- @ref radxa_rock_pi_e
7374
- @ref rockpi4
7475

7576
## DEBUGGING

‎docs/radxa_rock_pi_e.md

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@@ -0,0 +1,47 @@
1+
Radxa ROCK Pi E {#_Radxa}
2+
====================
3+
4+
Radxa ROCK Pi E is a Rockchip RK3288 based single board computer by Radxa. It can run Android or Linux.
5+
6+
Interface notes
7+
---------------
8+
9+
- UART2 is enabled as the default console.
10+
- All UART ports support baud up to 1500000.
11+
12+
Pin Mapping
13+
-----------
14+
15+
Radxa ROCK Pi E has a 40-pin expansion header. Each pin is distinguished by the color.
16+
17+
| Function5| Function4| Function3| Function2| Function1| PIN | PIN | Function1| Function2| Function3| Function4| Function5|
18+
|----------|----------|-----------|-------------|----------|:------|------:|----------|-------------|-----------|------------|------------|
19+
| | | | | 3V3| 1 | 2 | +5.0V| | | | |
20+
| | | | UART1_TXD| GPIO3_A4| 3 | 4 | +5.0V| | | | |
21+
| | | | UART1_RXD| GPIO3_A6| 5 | 6 | GND| | | | |
22+
| | | | | GPIO1_D4| 7 | 8 | GPIO2_A0| UART2_TX_M1| | | |
23+
| | | | | GND| 9 | 10 | GPIO2_A1| UART2_RX_M1| | | |
24+
| | | | | GPIO2_A2| 11 | 12 | GPIO2_C2| | | | |
25+
| | | | | GPIO2_A3| 13 | 14 | GND| | | | |
26+
| | | | | GPIO0_D3| 15 | 16 | USB20DM| | | | |
27+
| | | | | +3.3V| 17 | 18 | USB20DP| | | | |
28+
| | |SPI_TXD_M2 | | GPIO3_A1| 19 | 20 | GND| | | | |
29+
| | |SPI_RXD_M2 | | GPIO3_A2| 21 | 22 |SARADC_IN1| | | | |
30+
| | |SPI_CLK_M2 | | GPIO3_A0| 23 | 24 | GPIO3_B0| |SPI_CSN0_M2| | |
31+
| | | | | GND| 25 | 26 | GPIO2_B4| | | | |
32+
|PWM0 |I2C1_SDA | | | GPIO2_A4| 27 | 28 | GPIO2_A5| | | I2C1_SCL| PWM1|
33+
| | | | | GPIO2_C4| 29 | 30 | GND| | | | |
34+
| | | | | GPIO2_C5| 31 | 32 | GPIO2_C0| | | | |
35+
|PWM2 | | | | GPIO2_A6| 33 | 34 | GND| | | | |
36+
| | | | | GPIO2_C1| 35 | 36 | GPIO2_B7| | | | |
37+
| | | | | GPIO2_C6| 37 | 38 | GPIO2_C3| | | | |
38+
| | | | | GND| 39 | 40 | GPIO2_C7| | | | |
39+
40+
Supports
41+
--------
42+
43+
You can find additional product support in the following channels:
44+
45+
- [Product Info](https://docs.radxa.com/rockpi/e)
46+
- [Forums](https://forum.radxa.com/c/rockpie)
47+
- [Github](https://github.com/radxa)

‎include/arm/radxa_rock_pi_e.h

+30
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@@ -0,0 +1,30 @@
1+
/*
2+
* Author: Nascs <nascs@radxa.com>
3+
* Copyright (c) Radxa Limited.
4+
*
5+
* SPDX-License-Identifier: MIT
6+
*/
7+
8+
#pragma once
9+
10+
#ifdef __cplusplus
11+
extern "C" {
12+
#endif
13+
14+
#include "mraa_internal.h"
15+
16+
#define MRAA_RADXA_ROCK_PI_E_GPIO_COUNT 28
17+
#define MRAA_RADXA_ROCK_PI_E_I2C_COUNT 1
18+
#define MRAA_RADXA_ROCK_PI_E_SPI_COUNT 1
19+
#define MRAA_RADXA_ROCK_PI_E_UART_COUNT 2
20+
#define MRAA_RADXA_ROCK_PI_E_PWM_COUNT 1
21+
#define MRAA_RADXA_ROCK_PI_E_AIO_COUNT 1
22+
#define MRAA_RADXA_ROCK_PI_E_PIN_COUNT 40
23+
#define PLATFORM_NAME_RADXA_ROCK_PI_E "Radxa ROCK Pi E"
24+
25+
mraa_board_t *
26+
mraa_radxa_rock_pi_e();
27+
28+
#ifdef __cplusplus
29+
}
30+
#endif

‎src/CMakeLists.txt

+1
Original file line numberDiff line numberDiff line change
@@ -114,6 +114,7 @@ set (mraa_LIB_ARM_SRCS_NOAUTO
114114
${PROJECT_SOURCE_DIR}/src/arm/radxa_e25.c
115115
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_5a.c
116116
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_5b.c
117+
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_pi_e.c
117118
${PROJECT_SOURCE_DIR}/src/arm/radxa_cm5_io.c
118119
${PROJECT_SOURCE_DIR}/src/arm/rockpi4.c
119120
${PROJECT_SOURCE_DIR}/src/arm/adlink_ipi.c

‎src/arm/arm.c

+6
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include "arm/radxa_rock_3c.h"
1818
#include "arm/radxa_rock_5a.h"
1919
#include "arm/radxa_rock_5b.h"
20+
#include "arm/radxa_rock_pi_e.h"
2021
#include "arm/radxa_cm5_io.h"
2122
#include "arm/rockpi4.h"
2223
#include "arm/de_nano_soc.h"
@@ -118,6 +119,8 @@ mraa_arm_platform()
118119
platform_type = MRAA_RADXA_ROCK_5B;
119120
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_CM5_IO))
120121
platform_type = MRAA_RADXA_CM5_IO;
122+
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ROCK_PI_E))
123+
platform_type = MRAA_RADXA_ROCK_PI_E;
121124
else if (mraa_file_contains("/proc/device-tree/model", "ROCK Pi 4") ||
122125
mraa_file_contains("/proc/device-tree/model", "ROCK PI 4") ||
123126
mraa_file_contains("/proc/device-tree/model", "ROCK 4")
@@ -170,6 +173,9 @@ mraa_arm_platform()
170173
case MRAA_RADXA_ROCK_5B:
171174
plat = mraa_radxa_rock_5b();
172175
break;
176+
case MRAA_RADXA_ROCK_PI_E:
177+
plat = mraa_radxa_rock_pi_e();
178+
break;
173179
case MRAA_RADXA_CM5_IO:
174180
plat = mraa_radxa_cm5_io();
175181
break;

‎src/arm/radxa_rock_pi_e.c

+137
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@@ -0,0 +1,137 @@
1+
/*
2+
* Author: Nascs <nascs@radxa.com>
3+
* Copyright (c) Radxa Limited.
4+
*
5+
* SPDX-License-Identifier: MIT
6+
*/
7+
8+
#include <mraa/common.h>
9+
#include <stdarg.h>
10+
#include <stdlib.h>
11+
#include <string.h>
12+
#include <sys/mman.h>
13+
#include "arm/radxa_rock_pi_e.h"
14+
#include "common.h"
15+
16+
const char* radxa_rock_pi_e_serialdev[MRAA_RADXA_ROCK_PI_E_UART_COUNT] = { "/dev/ttyS1", "/dev/ttyS2"};
17+
18+
void
19+
mraa_radxa_rock_pi_e_pininfo(mraa_board_t* board, int index, int gpio_chip, int gpio_line, mraa_pincapabilities_t pincapabilities_t, char* pin_name)
20+
{
21+
22+
if (index > board->phy_pin_count)
23+
return;
24+
25+
mraa_pininfo_t* pininfo = &board->pins[index];
26+
strncpy(pininfo->name, pin_name, MRAA_PIN_NAME_SIZE);
27+
28+
if(pincapabilities_t.gpio == 1) {
29+
pininfo->gpio.gpio_chip = gpio_chip;
30+
pininfo->gpio.gpio_line = gpio_line;
31+
}
32+
33+
pininfo->capabilities = pincapabilities_t;
34+
35+
pininfo->gpio.mux_total = 0;
36+
}
37+
38+
mraa_board_t*
39+
mraa_radxa_rock_pi_e()
40+
{
41+
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
42+
if (b == NULL) {
43+
return NULL;
44+
}
45+
46+
b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
47+
if (b->adv_func == NULL) {
48+
free(b);
49+
return NULL;
50+
}
51+
52+
// pin mux for buses are setup by default by kernel so tell mraa to ignore them
53+
b->no_bus_mux = 1;
54+
b->phy_pin_count = MRAA_RADXA_ROCK_PI_E_PIN_COUNT + 1;
55+
56+
b->platform_name = PLATFORM_NAME_RADXA_ROCK_PI_E;
57+
b->chardev_capable = 1;
58+
59+
// UART
60+
b->uart_dev_count = MRAA_RADXA_ROCK_PI_E_UART_COUNT;
61+
b->def_uart_dev = 0;
62+
b->uart_dev[0].index = 1;
63+
b->uart_dev[1].index = 2;
64+
b->uart_dev[0].device_path = (char*) radxa_rock_pi_e_serialdev[0];
65+
b->uart_dev[1].device_path = (char*) radxa_rock_pi_e_serialdev[1];
66+
67+
// I2C
68+
b->i2c_bus_count = MRAA_RADXA_ROCK_PI_E_I2C_COUNT;
69+
b->def_i2c_bus = 0;
70+
b->i2c_bus[0].bus_id = 1;
71+
72+
// SPI
73+
b->spi_bus_count = MRAA_RADXA_ROCK_PI_E_SPI_COUNT;
74+
b->def_spi_bus = 0;
75+
b->spi_bus[0].bus_id = 3;
76+
77+
// PWM
78+
b->pwm_dev_count = MRAA_RADXA_ROCK_PI_E_PWM_COUNT;
79+
b->pwm_default_period = 500;
80+
b->pwm_max_period = 2147483;
81+
b->pwm_min_period = 1;
82+
83+
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count);
84+
if (b->pins == NULL) {
85+
free(b->adv_func);
86+
free(b);
87+
return NULL;
88+
}
89+
90+
b->pins[33].pwm.parent_id = 2; // pwm2
91+
b->pins[33].pwm.mux_total = 0;
92+
93+
// hardware V3.0
94+
mraa_radxa_rock_pi_e_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");
95+
mraa_radxa_rock_pi_e_pininfo(b, 1, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3");
96+
mraa_radxa_rock_pi_e_pininfo(b, 2, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V");
97+
mraa_radxa_rock_pi_e_pininfo(b, 3, 3, 4, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "GPIO3_A4");
98+
mraa_radxa_rock_pi_e_pininfo(b, 4, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V");
99+
mraa_radxa_rock_pi_e_pininfo(b, 5, 3, 6, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "GPIO3_A6");
100+
mraa_radxa_rock_pi_e_pininfo(b, 6, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
101+
mraa_radxa_rock_pi_e_pininfo(b, 7, 1, 28, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO1_D4");
102+
mraa_radxa_rock_pi_e_pininfo(b, 8, 2, 0, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "GPIO2_A0");
103+
mraa_radxa_rock_pi_e_pininfo(b, 9, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
104+
mraa_radxa_rock_pi_e_pininfo(b, 10, 2, 1, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "GPIO2_A1");
105+
mraa_radxa_rock_pi_e_pininfo(b, 11, 2, 2, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_A2");
106+
mraa_radxa_rock_pi_e_pininfo(b, 12, 2, 18, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_C2");
107+
mraa_radxa_rock_pi_e_pininfo(b, 13, 2, 3, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GPIO2_A3"); // Hardware cannot output low level
108+
mraa_radxa_rock_pi_e_pininfo(b, 14, -1, -1,(mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
109+
mraa_radxa_rock_pi_e_pininfo(b, 15, 0, 27, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO0_D3");
110+
mraa_radxa_rock_pi_e_pininfo(b, 16, -1, -1,(mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "USB20DM");
111+
mraa_radxa_rock_pi_e_pininfo(b, 17, -1, -1,(mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3");
112+
mraa_radxa_rock_pi_e_pininfo(b, 18, -1, -1,(mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "USB20DP");
113+
mraa_radxa_rock_pi_e_pininfo(b, 19, 3, 1, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO3_A1");
114+
mraa_radxa_rock_pi_e_pininfo(b, 20, -1, -1,(mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
115+
mraa_radxa_rock_pi_e_pininfo(b, 21, 3, 2, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO3_A2");
116+
mraa_radxa_rock_pi_e_pininfo(b, 22, -1, -1,(mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "SARADC_IN1");
117+
mraa_radxa_rock_pi_e_pininfo(b, 23, 3, 0, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO3_A0");
118+
mraa_radxa_rock_pi_e_pininfo(b, 24, 3, 8, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO3_B0");
119+
mraa_radxa_rock_pi_e_pininfo(b, 25, -1, -1,(mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
120+
mraa_radxa_rock_pi_e_pininfo(b, 26, 2, 12, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_B4");
121+
mraa_radxa_rock_pi_e_pininfo(b, 27, 2, 4, (mraa_pincapabilities_t){1,1,1,0,0,1,0,0}, "GPIO2_A4");
122+
mraa_radxa_rock_pi_e_pininfo(b, 28, 2, 5, (mraa_pincapabilities_t){1,1,1,0,0,1,0,0}, "GPIO2_A5");
123+
mraa_radxa_rock_pi_e_pininfo(b, 29, 2, 20, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_C4");
124+
mraa_radxa_rock_pi_e_pininfo(b, 30, -1, -1,(mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
125+
mraa_radxa_rock_pi_e_pininfo(b, 31, 2, 21, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_C5");
126+
mraa_radxa_rock_pi_e_pininfo(b, 32, 2, 16, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_C0");
127+
mraa_radxa_rock_pi_e_pininfo(b, 33, 2, 6, (mraa_pincapabilities_t){1,0,1,0,0,0,0,0}, "GPIO2_A6"); // tied to an IRQ
128+
mraa_radxa_rock_pi_e_pininfo(b, 34, -1, -1,(mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
129+
mraa_radxa_rock_pi_e_pininfo(b, 35, 2, 17, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_C1");
130+
mraa_radxa_rock_pi_e_pininfo(b, 36, 2, 15, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_B7");
131+
mraa_radxa_rock_pi_e_pininfo(b, 37, 2, 22, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_C6");
132+
mraa_radxa_rock_pi_e_pininfo(b, 38, 2, 19, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_C3");
133+
mraa_radxa_rock_pi_e_pininfo(b, 39, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
134+
mraa_radxa_rock_pi_e_pininfo(b, 40, 2, 23, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO2_C7");
135+
136+
return b;
137+
}

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