Updated README with setup instructions

Author: callendorph

README.md

@@ -4,27 +4,47 @@ This project contains a VHDL-based JTAG TAP Master controller. This controller c
 
 The goal is to provide an AXI compatible interface that would allow easy integration with a host, for example in a Zynq-7000.
 
+This project uses [OSVVM](https://github.com/OSVVM/OsvvmLibraries) as a verification framework.
+
 ## Setup
 
-Install `ghdl`:
+Install `ghdl >= 3.0.0`:
 
 ```
-$> sudo apt install ghdl gtkwave
+$> sudo snap install ghdl
 ```
 
-## Run Test Benches
+Install dependencies for OSVVM:
+
+```
+$> sudo apt install tcl tcllib rlwrap
+```
+
+Setup submodules
 
 ```
-$> make
+$> git submodule update --init
 ```
 
-Alternatively - you can run individual tests:
+## Run Test Benches
 
 ```
-$> make TAP_Basic
+$> ./run_tests.tclsh
 ```
 
+This should run to completion and generate several files in the root directory:
+
+1.  `TAPController_RunTest.html` - This is the main browser viewable report.
+	1.  There will also be an `*.xml` and `*.yml` variant.
+2.  `reports` - More test suite specific HTMl reports.
+3.  `results` - Simulation run logs.
+4.  `logs` - Build logs
+3.  `VHDL_LIBS` - directory where the GHDL compiled libraries are kept.
+
+
 ## Synthesis
 
 @TODO - Xilinx Demo Project
+
+
 @TODO - Xilinx Synthesis Report & Resource Utilization.