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driver-bab.c
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/*
* Copyright 2013-2014 Andrew Smith
* Copyright 2013 bitfury
*
* BitFury GPIO code originally based on chainminer code:
* https://github.com/bfsb/chainminer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 3 of the License, or (at your option)
* any later version. See COPYING for more details.
*/
#include "config.h"
#include "compat.h"
#include "miner.h"
#include "sha2.h"
#include "klist.h"
#include <ctype.h>
/*
* Tested on RPi running both Raspbian and Arch
* with BlackArrow BitFury V1 & V2 GPIO Controller
* with 16 chip BlackArrow BitFury boards
*/
#ifndef LINUX
static void bab_detect(__maybe_unused bool hotplug)
{
}
#else
#include <unistd.h>
#include <linux/spi/spidev.h>
#include <sys/mman.h>
#include <sys/ioctl.h>
#include <fcntl.h>
#define BAB_SPI_BUS 0
#define BAB_SPI_CHIP 0
#define BAB_SPI_SPEED 96000
#define BAB_SPI_BUFSIZ 1024
#define BAB_DELAY_USECS 0
#define BAB_TRF_DELAY 0
#define BAB_ADDR(_n) (*((babinfo->gpio) + (_n)))
#define BAB_INP_GPIO(_n) BAB_ADDR((_n) / 10) &= (~(7 << (((_n) % 10) * 3)))
#define BAB_OUT_GPIO(_n) BAB_ADDR((_n) / 10) |= (1 << (((_n) % 10) * 3))
#define BAB_OUT_GPIO_V(_n, _v) BAB_ADDR((_n) / 10) |= (((_v) <= 3 ? (_v) + 4 : \
((_v) == 4 ? 3 : 2)) << (((_n) % 10) * 3))
#define BAB_GPIO_SET BAB_ADDR(7)
#define BAB_GPIO_CLR BAB_ADDR(10)
#define BAB_GPIO_LEVEL BAB_ADDR(13)
// If the V1 test of this many chips finds no chips it will try V2
#define BAB_V1_CHIP_TEST 32
//maximum number of chips per board
#define BAB_BOARDCHIPS 16
#define BAB_MAXBUF (BAB_MAXCHIPS * 512)
#define BAB_V1_BANK 0
//maximum number of alternative banks
#define BAB_MAXBANKS 4
//maximum number of boards in a bank
#define BAB_BANKBOARDS 6
//maximum number of chips on alternative bank
#define BAB_BANKCHIPS (BAB_BOARDCHIPS * BAB_BANKBOARDS)
//maximum number of chips
#define BAB_MAXCHIPS (BAB_MAXBANKS * BAB_BANKCHIPS)
#define BAB_CORES 16
#define BAB_X_COORD 21
#define BAB_Y_COORD 36
#define BAB_NOOP 0
#define BAB_BREAK ((uint8_t *)"\04")
#define BAB_ASYNC ((uint8_t *)"\05")
#define BAB_SYNC ((uint8_t *)"\06")
#define BAB_FFL " - from %s %s() line %d"
#define BAB_FFL_HERE __FILE__, __func__, __LINE__
#define BAB_FFL_PASS file, func, line
#define bab_reset(_bank, _times) _bab_reset(babcgpu, babinfo, _bank, _times)
#define bab_txrx(_item, _det) _bab_txrx(babcgpu, babinfo, _item, _det, BAB_FFL_HERE)
#define bab_add_buf(_item, _data) _bab_add_buf(_item, _data, sizeof(_data)-1, BAB_FFL_HERE)
#define BAB_ADD_BREAK(_item) _bab_add_buf(_item, BAB_BREAK, 1, BAB_FFL_HERE)
#define BAB_ADD_ASYNC(_item) _bab_add_buf(_item, BAB_ASYNC, 1, BAB_FFL_HERE)
#define bab_config_reg(_item, _reg, _ena) _bab_config_reg(_item, _reg, _ena, BAB_FFL_HERE)
#define bab_add_data(_item, _addr, _data, _siz) _bab_add_data(_item, _addr, (const uint8_t *)(_data), _siz, BAB_FFL_HERE)
#define BAB_ADD_NOOPs(_item, _count) _bab_add_noops(_item, _count, BAB_FFL_HERE)
#define BAB_ADD_MIN 4
#define BAB_ADD_MAX 128
#define BAB_BASEA 4
#define BAB_BASEB 61
#define BAB_COUNTERS 16
static const uint8_t bab_counters[BAB_COUNTERS] = {
64, 64,
BAB_BASEA, BAB_BASEA+4,
BAB_BASEA+2, BAB_BASEA+2+16,
BAB_BASEA, BAB_BASEA+1,
(BAB_BASEB)%65, (BAB_BASEB+1)%65,
(BAB_BASEB+3)%65, (BAB_BASEB+3+16)%65,
(BAB_BASEB+4)%65, (BAB_BASEB+4+4)%65,
(BAB_BASEB+3+3)%65, (BAB_BASEB+3+1+3)%65
};
#define BAB_W1 16
static const uint32_t bab_w1[BAB_W1] = {
0, 0, 0, 0xffffffff,
0x80000000, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0x00000280
};
#define BAB_W2 8
static const uint32_t bab_w2[BAB_W2] = {
0x80000000, 0, 0, 0,
0, 0, 0, 0x00000100
};
#define BAB_TEST_DATA 19
static const uint32_t bab_test_data[BAB_TEST_DATA] = {
0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5,
0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1,
0x8a1a6b7e, 0x6f484872, 0x4ff0bb9b, 0x12c97f07,
0xb0e72d8e, 0x55d979bc, 0x39403296, 0x40f09e84,
0x8a0bb7b7, 0x33af304f, 0x0b290c1a //, 0xf0c4e61f
};
/*
* maximum chip speed available for auto tuner
* speed/nrate/hrate/watt
* 53/ 97/ 100/ 84
* 54/ 98/ 107/ 88
* 55/ 99/ 115/ 93
* 56/ 101/ 125/ 99
*/
#define BAB_MAXSPEED 57
#define BAB_DEFMAXSPEED 55
#define BAB_DEFSPEED 54
#define BAB_MINSPEED 52
/*
* % of errors to tune the speed up or down
* 1.0 to 10.0 should average around 5.5% errors
*/
#define BAB_TUNEUP 1.0
#define BAB_TUNEDOWN 10.0
#define MIDSTATE_BYTES 32
#define MERKLE_OFFSET 64
#define MERKLE_BYTES 12
#define BLOCK_HEADER_BYTES 80
#define MIDSTATE_UINTS (MIDSTATE_BYTES / sizeof(uint32_t))
#define DATA_UINTS ((BLOCK_HEADER_BYTES / sizeof(uint32_t)) - 1)
// Auto adjust
#define BAB_AUTO_REG 0
#define BAB_AUTO_VAL 0x01
// iclk
#define BAB_ICLK_REG 1
#define BAB_ICLK_VAL 0x02
// No fast clock
#define BAB_FAST_REG 2
#define BAB_FAST_VAL 0x04
// Divide by 2
#define BAB_DIV2_REG 3
#define BAB_DIV2_VAL 0x08
// Slow Clock
#define BAB_SLOW_REG 4
#define BAB_SLOW_VAL 0x10
// No oclk
#define BAB_OCLK_REG 6
#define BAB_OCLK_VAL 0x20
// Has configured
#define BAB_CFGD_VAL 0x40
#define BAB_DEFCONF (BAB_AUTO_VAL | \
BAB_ICLK_VAL | \
BAB_DIV2_VAL | \
BAB_SLOW_VAL)
#define BAB_REG_CLR_FROM 7
#define BAB_REG_CLR_TO 11
#define BAB_AUTO_SET(_c) ((_c) & BAB_AUTO_VAL)
#define BAB_ICLK_SET(_c) ((_c) & BAB_ICLK_VAL)
#define BAB_FAST_SET(_c) ((_c) & BAB_FAST_VAL)
#define BAB_DIV2_SET(_c) ((_c) & BAB_DIV2_VAL)
#define BAB_SLOW_SET(_c) ((_c) & BAB_SLOW_VAL)
#define BAB_OCLK_SET(_c) ((_c) & BAB_OCLK_VAL)
#define BAB_CFGD_SET(_c) ((_c) & BAB_CFGD_VAL)
#define BAB_AUTO_BIT(_c) (BAB_AUTO_SET(_c) ? true : false)
#define BAB_ICLK_BIT(_c) (BAB_ICLK_SET(_c) ? false : true)
#define BAB_FAST_BIT(_c) (BAB_FAST_SET(_c) ? true : false)
#define BAB_DIV2_BIT(_c) (BAB_DIV2_SET(_c) ? false : true)
#define BAB_SLOW_BIT(_c) (BAB_SLOW_SET(_c) ? true : false)
#define BAB_OCLK_BIT(_c) (BAB_OCLK_SET(_c) ? true : false)
#define BAB_COUNT_ADDR 0x0100
#define BAB_W1A_ADDR 0x1000
#define BAB_W1B_ADDR 0x1400
#define BAB_W2_ADDR 0x1900
#define BAB_INP_ADDR 0x3000
#define BAB_OSC_ADDR 0x6000
#define BAB_REG_ADDR 0x7000
/*
* valid: 0x01 0x03 0x07 0x0F 0x1F 0x3F 0x7F 0xFF
* max { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0x00 }
* max { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x00 }
* avg { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00 }
* slo { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x00 }
* min { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
* good: 0x1F (97) 0x3F (104) 0x7F (109) 0xFF (104)
*/
#define BAB_OSC 8
static const uint8_t bab_osc_bits[BAB_OSC] =
{ 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F, 0xFF };
static const uint8_t bab_reg_ena[4] = { 0xc1, 0x6a, 0x59, 0xe3 };
static const uint8_t bab_reg_dis[4] = { 0x00, 0x00, 0x00, 0x00 };
#define BAB_NONCE_OFFSETS 3
#define BAB_OFF_0x1C_STA 2
#define BAB_OFF_0x1C_FIN 2
#define BAB_OFF_OTHER_STA 0
#define BAB_OFF_OTHER_FIN 1
#define BAB_EVIL_NONCE 0xe0
#define BAB_EVIL_MASK 0xff
static const uint32_t bab_nonce_offsets[] = {-0x800000, 0, -0x400000};
struct bab_work_send {
uint32_t midstate[MIDSTATE_UINTS];
uint32_t ms3steps[MIDSTATE_UINTS];
uint32_t merkle7;
uint32_t ntime;
uint32_t bits;
};
#define BAB_REPLY_NONCES 16
struct bab_work_reply {
uint32_t nonce[BAB_REPLY_NONCES];
uint32_t jobsel;
uint32_t spichk;
};
#define BAB_CHIP_MIN (sizeof(struct bab_work_reply)+16)
#define ALLOC_WITEMS 1024
#define LIMIT_WITEMS 0
// Work
typedef struct witem {
struct work *work;
struct bab_work_send chip_input;
bool ci_setup;
int nonces;
struct timeval work_start;
} WITEM;
#define ALLOC_SITEMS 8
#define LIMIT_SITEMS 0
// SPI I/O
typedef struct sitem {
uint32_t siz;
uint8_t wbuf[BAB_MAXBUF];
uint8_t rbuf[BAB_MAXBUF];
uint32_t chip_off[BAB_MAXCHIPS+1];
uint32_t bank_off[BAB_MAXBANKS+2];
// WITEMs used to build the work
K_ITEM *witems[BAB_MAXCHIPS];
struct timeval work_start;
} SITEM;
#define ALLOC_RITEMS 256
#define LIMIT_RITEMS 0
// Results
typedef struct ritem {
int chip;
int nonces;
uint32_t nonce[BAB_REPLY_NONCES];
bool not_first_reply;
struct timeval when;
} RITEM;
#define ALLOC_NITEMS 102400
#define LIMIT_NITEMS 0
// Nonce History
typedef struct nitem {
struct timeval found;
} NITEM;
#define DATAW(_item) ((WITEM *)(_item->data))
#define DATAS(_item) ((SITEM *)(_item->data))
#define DATAR(_item) ((RITEM *)(_item->data))
#define DATAN(_item) ((NITEM *)(_item->data))
// Record the number of each band between work sends
#define BAB_DELAY_BANDS 10
#define BAB_DELAY_BASE 0.5
#define BAB_DELAY_STEP 0.2
#define BAB_CHIP_SPEEDS 6
// less than or equal GH/s
static double chip_speed_ranges[BAB_CHIP_SPEEDS - 1] =
{ 0.0, 0.8, 1.6, 2.2, 2.8 };
// Greater than the last one above means it's the last speed
static char *chip_speed_names[BAB_CHIP_SPEEDS] =
{ "Dead", "V.Slow", "Slow", "OK", "Good", "Fast" };
/*
* This is required to do chip tuning
* If disabled, it will simply run the chips at default speed
*/
#define UPDATE_HISTORY 1
struct bab_info {
struct thr_info spi_thr;
struct thr_info res_thr;
pthread_mutex_t did_lock;
pthread_mutex_t nonce_lock;
// All GPIO goes through this
volatile unsigned *gpio;
int version;
int spifd;
int chips;
int chips_per_bank[BAB_MAXBANKS+1];
int missing_chips_per_bank[BAB_MAXBANKS+1];
int boards;
int banks;
uint32_t chip_spis[BAB_MAXCHIPS+1];
int reply_wait;
uint64_t reply_waits;
cgsem_t scan_work;
cgsem_t spi_work;
cgsem_t spi_reply;
cgsem_t process_reply;
struct bab_work_reply chip_results[BAB_MAXCHIPS];
struct bab_work_reply chip_prev[BAB_MAXCHIPS];
uint8_t chip_fast[BAB_MAXCHIPS];
uint8_t chip_conf[BAB_MAXCHIPS];
uint8_t old_fast[BAB_MAXCHIPS];
uint8_t old_conf[BAB_MAXCHIPS];
uint8_t chip_bank[BAB_MAXCHIPS+1];
uint8_t osc[BAB_OSC];
/*
* Ignore errors in the first work reply since
* they may be from a previous run or random junk
* There can be >100 with just one 16 chip board
*/
uint32_t initial_ignored;
bool not_first_reply[BAB_MAXCHIPS];
// Stats
uint64_t core_good[BAB_MAXCHIPS][BAB_CORES];
uint64_t core_bad[BAB_MAXCHIPS][BAB_CORES];
uint64_t chip_spie[BAB_MAXCHIPS]; // spi errors
uint64_t chip_miso[BAB_MAXCHIPS]; // msio errors
uint64_t chip_nonces[BAB_MAXCHIPS];
uint64_t chip_good[BAB_MAXCHIPS];
uint64_t chip_bad[BAB_MAXCHIPS];
uint64_t chip_ncore[BAB_MAXCHIPS][BAB_X_COORD][BAB_Y_COORD];
uint64_t chip_cont_bad[BAB_MAXCHIPS];
uint64_t chip_max_bad[BAB_MAXCHIPS];
uint64_t discarded_e0s;
uint64_t untested_nonces;
uint64_t tested_nonces;
uint64_t new_nonces;
uint64_t ok_nonces;
uint64_t nonce_offset_count[BAB_NONCE_OFFSETS];
uint64_t total_tests;
uint64_t max_tests_per_nonce;
uint64_t total_links;
uint64_t total_proc_links;
uint64_t max_links;
uint64_t max_proc_links;
uint64_t total_work_links;
uint64_t fail;
uint64_t fail_total_tests;
uint64_t fail_total_links;
uint64_t fail_total_work_links;
uint64_t ign_total_tests;
uint64_t ign_total_links;
uint64_t ign_total_work_links;
struct timeval last_sent_work;
uint64_t delay_count;
double delay_min;
double delay_max;
/*
* 0 is below band ranges
* BAB_DELAY_BANDS+1 is above band ranges
*/
uint64_t delay_bands[BAB_DELAY_BANDS+2];
uint64_t send_count;
double send_total;
double send_min;
double send_max;
// Work
K_LIST *wfree_list;
K_STORE *available_work;
K_STORE *chip_work[BAB_MAXCHIPS];
// SPI I/O
K_LIST *sfree_list;
// Waiting to send
K_STORE *spi_list;
// Sent
K_STORE *spi_sent;
// Results
K_LIST *rfree_list;
K_STORE *res_list;
// Nonce History
K_LIST *nfree_list;
K_STORE *good_nonces[BAB_MAXCHIPS];
K_STORE *bad_nonces[BAB_MAXCHIPS];
#if UPDATE_HISTORY
struct timeval first_work[BAB_MAXCHIPS];
uint32_t work_count[BAB_MAXCHIPS];
struct timeval last_tune[BAB_MAXCHIPS];
uint8_t bad_fast[BAB_MAXCHIPS];
bool dead_msg[BAB_MAXCHIPS];
#endif
// bab-options (in order)
uint8_t max_speed;
uint8_t def_speed;
uint8_t min_speed;
double tune_up;
double tune_down;
uint32_t speed_hz;
uint16_t delay_usecs;
uint64_t trf_delay;
struct timeval last_did;
bool initialised;
};
/*
* Amount of time for history
* Older items in nonce_history are discarded
* 300s / 5 minutes
*/
#define HISTORY_TIME_S 300
/*
* If the SPI I/O thread waits longer than this long for work
* it will report an error saying how long it's waiting
* and again every BAB_STD_WAIT_mS after that
*/
#define BAB_LONG_uS 1200000
/*
* If work wasn't available early enough,
* report every BAB_LONG_WAIT_mS until it is
*/
#define BAB_LONG_WAIT_mS 888
/*
* Some amount of time to wait for work
* before checking how long we've waited
*/
#define BAB_STD_WAIT_mS 888
/*
* How long to wait for the ioctl() to complete (per BANK)
* This is a failsafe in case the ioctl() fails
* since bab_txrx() will already post a wakeup when it completes
* V1 is set to this x 2
* V2 is set to this x active banks
*/
#define BAB_REPLY_WAIT_mS 160
/*
* Work items older than this should not expect results
* It has to allow for the result buffer returned with the next result
* 0.75GH/s takes 5.727s to do a full nonce range
* If HW is too high, consider increasing this to see if work is being
* expired too early (due to slow chips)
*/
#define BAB_WORK_EXPIRE_mS 7800
// Don't send work more often than this
#define BAB_EXPECTED_WORK_DELAY_mS 899
static void bab_ms3steps(uint32_t *p)
{
uint32_t a, b, c, d, e, f, g, h, new_e, new_a;
int i;
a = p[0];
b = p[1];
c = p[2];
d = p[3];
e = p[4];
f = p[5];
g = p[6];
h = p[7];
for (i = 0; i < 3; i++) {
new_e = p[i+16] + sha256_k[i] + h + CH(e,f,g) + SHA256_F2(e) + d;
new_a = p[i+16] + sha256_k[i] + h + CH(e,f,g) + SHA256_F2(e) +
SHA256_F1(a) + MAJ(a,b,c);
d = c;
c = b;
b = a;
a = new_a;
h = g;
g = f;
f = e;
e = new_e;
}
p[15] = a;
p[14] = b;
p[13] = c;
p[12] = d;
p[11] = e;
p[10] = f;
p[9] = g;
p[8] = h;
}
static uint32_t bab_decnonce(uint32_t in)
{
uint32_t out;
/* First part load */
out = (in & 0xFF) << 24;
in >>= 8;
/* Byte reversal */
in = (((in & 0xaaaaaaaa) >> 1) | ((in & 0x55555555) << 1));
in = (((in & 0xcccccccc) >> 2) | ((in & 0x33333333) << 2));
in = (((in & 0xf0f0f0f0) >> 4) | ((in & 0x0f0f0f0f) << 4));
out |= (in >> 2) & 0x3FFFFF;
/* Extraction */
if (in & 1)
out |= (1 << 23);
if (in & 2)
out |= (1 << 22);
out -= 0x800004;
return out;
}
static void cleanup_older(struct cgpu_info *babcgpu, int chip, K_ITEM *witem)
{
struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
struct timeval now;
bool expired_item;
K_ITEM *tail;
cgtime(&now);
K_WLOCK(babinfo->chip_work[chip]);
tail = babinfo->chip_work[chip]->tail;
expired_item = false;
// Discard expired work
while (tail) {
if (ms_tdiff(&now, &(DATAW(tail)->work_start)) < BAB_WORK_EXPIRE_mS)
break;
if (tail == witem)
expired_item = true;
k_unlink_item(babinfo->chip_work[chip], tail);
K_WUNLOCK(babinfo->chip_work[chip]);
work_completed(babcgpu, DATAW(tail)->work);
K_WLOCK(babinfo->chip_work[chip]);
k_add_head(babinfo->wfree_list, tail);
tail = babinfo->chip_work[chip]->tail;
}
// If we didn't expire witem, then remove all older than it
if (!expired_item && witem && witem->next) {
tail = babinfo->chip_work[chip]->tail;
while (tail && tail != witem) {
k_unlink_item(babinfo->chip_work[chip], tail);
K_WUNLOCK(babinfo->chip_work[chip]);
work_completed(babcgpu, DATAW(tail)->work);
K_WLOCK(babinfo->chip_work[chip]);
k_add_head(babinfo->wfree_list, tail);
tail = babinfo->chip_work[chip]->tail;
}
}
K_WUNLOCK(babinfo->chip_work[chip]);
}
static void _bab_reset(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, int bank, int times)
{
const int banks[BAB_MAXBANKS] = { 18, 23, 24, 25 };
int i;
BAB_INP_GPIO(10);
BAB_OUT_GPIO(10);
BAB_INP_GPIO(11);
BAB_OUT_GPIO(11);
if (bank) {
for (i = 0; i < BAB_MAXBANKS; i++) {
BAB_INP_GPIO(banks[i]);
BAB_OUT_GPIO(banks[i]);
if (bank == i+1)
BAB_GPIO_SET = 1 << banks[i];
else
BAB_GPIO_CLR = 1 << banks[i];
}
cgsleep_us(4096);
} else {
for (i = 0; i < BAB_MAXBANKS; i++)
BAB_INP_GPIO(banks[i]);
}
BAB_GPIO_SET = 1 << 11;
for (i = 0; i < times; i++) { // 1us = 1MHz
BAB_GPIO_SET = 1 << 10;
cgsleep_us(1);
BAB_GPIO_CLR = 1 << 10;
cgsleep_us(1);
}
BAB_GPIO_CLR = 1 << 11;
BAB_INP_GPIO(11);
BAB_INP_GPIO(10);
BAB_INP_GPIO(9);
BAB_OUT_GPIO_V(11, 0);
BAB_OUT_GPIO_V(10, 0);
BAB_OUT_GPIO_V(9, 0);
}
// TODO: handle a false return where this is called?
static bool _bab_txrx(struct cgpu_info *babcgpu, struct bab_info *babinfo, K_ITEM *item, bool detect_ignore, const char *file, const char *func, const int line)
{
int bank, i, count;
uint32_t siz, pos;
struct spi_ioc_transfer tran;
uintptr_t rbuf, wbuf;
wbuf = (uintptr_t)(DATAS(item)->wbuf);
rbuf = (uintptr_t)(DATAS(item)->rbuf);
siz = (uint32_t)(DATAS(item)->siz);
memset(&tran, 0, sizeof(tran));
tran.speed_hz = babinfo->speed_hz;
tran.delay_usecs = babinfo->delay_usecs;
i = 0;
pos = 0;
for (bank = 0; bank <= BAB_MAXBANKS; bank++) {
if (DATAS(item)->bank_off[bank]) {
bab_reset(bank, 64);
break;
}
}
if (unlikely(bank > BAB_MAXBANKS)) {
applog(LOG_ERR, "%s%d: %s() failed to find a bank" BAB_FFL,
babcgpu->drv->name, babcgpu->device_id,
__func__, BAB_FFL_PASS);
return false;
}
count = 0;
while (siz > 0) {
tran.tx_buf = wbuf;
tran.rx_buf = rbuf;
tran.speed_hz = BAB_SPI_SPEED;
if (pos == DATAS(item)->bank_off[bank]) {
for (; ++bank <= BAB_MAXBANKS; ) {
if (DATAS(item)->bank_off[bank] > pos) {
bab_reset(bank, 64);
break;
}
}
}
if (siz < BAB_SPI_BUFSIZ)
tran.len = siz;
else
tran.len = BAB_SPI_BUFSIZ;
if (pos < DATAS(item)->bank_off[bank] &&
DATAS(item)->bank_off[bank] < (pos + tran.len))
tran.len = DATAS(item)->bank_off[bank] - pos;
for (; i < babinfo->chips; i++) {
if (!DATAS(item)->chip_off[i])
continue;
if (DATAS(item)->chip_off[i] >= pos + tran.len) {
tran.speed_hz = babinfo->chip_spis[i];
break;
}
}
if (unlikely(i > babinfo->chips)) {
applog(LOG_ERR, "%s%d: %s() failed to find chip" BAB_FFL,
babcgpu->drv->name, babcgpu->device_id,
__func__, BAB_FFL_PASS);
return false;
}
if (unlikely(babinfo->chip_spis[i] == BAB_SPI_SPEED)) {
applog(LOG_DEBUG, "%s%d: %s() chip[%d] speed %d shouldn't be %d" BAB_FFL,
babcgpu->drv->name, babcgpu->device_id,
__func__, i, (int)babinfo->chip_spis[i],
BAB_SPI_SPEED, BAB_FFL_PASS);
}
if (unlikely(tran.speed_hz == BAB_SPI_SPEED)) {
applog(LOG_DEBUG, "%s%d: %s() transfer speed %d shouldn't be %d" BAB_FFL,
babcgpu->drv->name, babcgpu->device_id,
__func__, (int)tran.speed_hz,
BAB_SPI_SPEED, BAB_FFL_PASS);
}
count++;
if (ioctl(babinfo->spifd, SPI_IOC_MESSAGE(1), (void *)&tran) < 0) {
if (!detect_ignore || errno != 110) {
applog(LOG_ERR, "%s%d: ioctl (%d) failed err=%d" BAB_FFL,
babcgpu->drv->name, babcgpu->device_id,
count, errno, BAB_FFL_PASS);
}
return false;
}
siz -= tran.len;
wbuf += tran.len;
rbuf += tran.len;
pos += tran.len;
if (siz > 0 && babinfo->trf_delay > 0)
cgsleep_us(babinfo->trf_delay);
}
cgtime(&(DATAS(item)->work_start));
mutex_lock(&(babinfo->did_lock));
cgtime(&(babinfo->last_did));
mutex_unlock(&(babinfo->did_lock));
return true;
}
static void _bab_add_buf_rev(K_ITEM *item, const uint8_t *data, uint32_t siz, const char *file, const char *func, const int line)
{
uint32_t now_used, i;
uint8_t tmp;
now_used = DATAS(item)->siz;
if (now_used + siz >= BAB_MAXBUF) {
quitfrom(1, file, func, line,
"%s() buffer limit of %d exceeded=%d siz=%d",
__func__, BAB_MAXBUF, (int)(now_used + siz), (int)siz);
}
for (i = 0; i < siz; i++) {
tmp = data[i];
tmp = ((tmp & 0xaa)>>1) | ((tmp & 0x55) << 1);
tmp = ((tmp & 0xcc)>>2) | ((tmp & 0x33) << 2);
tmp = ((tmp & 0xf0)>>4) | ((tmp & 0x0f) << 4);
DATAS(item)->wbuf[now_used + i] = tmp;
}
DATAS(item)->siz += siz;
}
static void _bab_add_buf(K_ITEM *item, const uint8_t *data, size_t siz, const char *file, const char *func, const int line)
{
uint32_t now_used;
now_used = DATAS(item)->siz;
if (now_used + siz >= BAB_MAXBUF) {
quitfrom(1, file, func, line,
"%s() DATAS buffer limit of %d exceeded=%d siz=%d",
__func__, BAB_MAXBUF, (int)(now_used + siz), (int)siz);
}
memcpy(&(DATAS(item)->wbuf[now_used]), data, siz);
DATAS(item)->siz += siz;
}
static void _bab_add_noops(K_ITEM *item, size_t siz, const char *file, const char *func, const int line)
{
uint32_t now_used;
now_used = DATAS(item)->siz;
if (now_used + siz >= BAB_MAXBUF) {
quitfrom(1, file, func, line,
"%s() DATAS buffer limit of %d exceeded=%d siz=%d",
__func__, BAB_MAXBUF, (int)(now_used + siz), (int)siz);
}
memset(&(DATAS(item)->wbuf[now_used]), BAB_NOOP, siz);
DATAS(item)->siz += siz;
}
static void _bab_add_data(K_ITEM *item, uint32_t addr, const uint8_t *data, size_t siz, const char *file, const char *func, const int line)
{
uint8_t tmp[3];
int trf_siz;
if (siz < BAB_ADD_MIN || siz > BAB_ADD_MAX) {
quitfrom(1, file, func, line,
"%s() called with invalid siz=%d (min=%d max=%d)",
__func__, (int)siz, BAB_ADD_MIN, BAB_ADD_MAX);
}
trf_siz = siz / 4;
tmp[0] = (trf_siz - 1) | 0xE0;
tmp[1] = (addr >> 8) & 0xff;
tmp[2] = addr & 0xff;
_bab_add_buf(item, tmp, sizeof(tmp), BAB_FFL_PASS);
_bab_add_buf_rev(item, data, siz, BAB_FFL_PASS);
}
static void _bab_config_reg(K_ITEM *item, uint32_t reg, bool enable, const char *file, const char *func, const int line)
{
if (enable) {
_bab_add_data(item, BAB_REG_ADDR + reg*32,
bab_reg_ena, sizeof(bab_reg_ena), BAB_FFL_PASS);
} else {
_bab_add_data(item, BAB_REG_ADDR + reg*32,
bab_reg_dis, sizeof(bab_reg_dis), BAB_FFL_PASS);
}
}
static void bab_set_osc(struct bab_info *babinfo, int chip)
{
int fast, i;
fast = babinfo->chip_fast[chip];
for (i = 0; i < BAB_OSC && fast > BAB_OSC; i++, fast -= BAB_OSC) {
babinfo->osc[i] = 0xff;
}
if (i < BAB_OSC && fast > 0 && fast <= BAB_OSC)
babinfo->osc[i++] = bab_osc_bits[fast - 1];
for (; i < BAB_OSC; i++)
babinfo->osc[i] = 0x00;
applog(LOG_DEBUG, "@osc(chip=%d) fast=%d 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x", chip, fast, babinfo->osc[0], babinfo->osc[1], babinfo->osc[2], babinfo->osc[3], babinfo->osc[4], babinfo->osc[5], babinfo->osc[6], babinfo->osc[7]);
}
static void bab_put(struct bab_info *babinfo, K_ITEM *sitem)
{
struct bab_work_send *chip_input;
int i, reg, bank = 0;
size_t chip_siz;
BAB_ADD_BREAK(sitem);
for (i = 0; i < babinfo->chips; i++) {
if (babinfo->chip_bank[i] != bank) {
DATAS(sitem)->bank_off[bank] = DATAS(sitem)->siz;
bank = babinfo->chip_bank[i];
BAB_ADD_BREAK(sitem);
}
if (BAB_CFGD_SET(babinfo->chip_conf[i]) || !babinfo->chip_conf[i]) {
bab_set_osc(babinfo, i);
bab_add_data(sitem, BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc));
bab_config_reg(sitem, BAB_ICLK_REG, BAB_ICLK_BIT(babinfo->chip_conf[i]));
bab_config_reg(sitem, BAB_FAST_REG, BAB_FAST_BIT(babinfo->chip_conf[i]));
bab_config_reg(sitem, BAB_DIV2_REG, BAB_DIV2_BIT(babinfo->chip_conf[i]));
bab_config_reg(sitem, BAB_SLOW_REG, BAB_SLOW_BIT(babinfo->chip_conf[i]));
bab_config_reg(sitem, BAB_OCLK_REG, BAB_OCLK_BIT(babinfo->chip_conf[i]));
for (reg = BAB_REG_CLR_FROM; reg <= BAB_REG_CLR_TO; reg++)
bab_config_reg(sitem, reg, false);
if (babinfo->chip_conf[i]) {
bab_add_data(sitem, BAB_COUNT_ADDR, bab_counters, sizeof(bab_counters));
bab_add_data(sitem, BAB_W1A_ADDR, bab_w1, sizeof(bab_w1));
bab_add_data(sitem, BAB_W1B_ADDR, bab_w1, sizeof(bab_w1)/2);
bab_add_data(sitem, BAB_W2_ADDR, bab_w2, sizeof(bab_w2));
babinfo->chip_conf[i] ^= BAB_CFGD_VAL;
}
babinfo->old_fast[i] = babinfo->chip_fast[i];
babinfo->old_conf[i] = babinfo->chip_conf[i];
} else {
if (babinfo->old_fast[i] != babinfo->chip_fast[i]) {
bab_set_osc(babinfo, i);
bab_add_data(sitem, BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc));
babinfo->old_fast[i] = babinfo->chip_fast[i];
}
if (babinfo->old_conf[i] != babinfo->chip_conf[i]) {
if (BAB_ICLK_SET(babinfo->old_conf[i]) !=
BAB_ICLK_SET(babinfo->chip_conf[i]))
bab_config_reg(sitem, BAB_ICLK_REG,
BAB_ICLK_BIT(babinfo->chip_conf[i]));
if (BAB_FAST_SET(babinfo->old_conf[i]) !=
BAB_FAST_SET(babinfo->chip_conf[i]))
bab_config_reg(sitem, BAB_FAST_REG,
BAB_FAST_BIT(babinfo->chip_conf[i]));
if (BAB_DIV2_SET(babinfo->old_conf[i]) !=
BAB_DIV2_SET(babinfo->chip_conf[i]))
bab_config_reg(sitem, BAB_DIV2_REG,
BAB_DIV2_BIT(babinfo->chip_conf[i]));
if (BAB_SLOW_SET(babinfo->old_conf[i]) !=
BAB_SLOW_SET(babinfo->chip_conf[i]))
bab_config_reg(sitem, BAB_SLOW_REG,
BAB_SLOW_BIT(babinfo->chip_conf[i]));
if (BAB_OCLK_SET(babinfo->old_conf[i]) !=
BAB_OCLK_SET(babinfo->chip_conf[i]))
bab_config_reg(sitem, BAB_OCLK_REG,
BAB_OCLK_BIT(babinfo->chip_conf[i]));
babinfo->old_conf[i] = babinfo->chip_conf[i];
}
}
DATAS(sitem)->chip_off[i] = DATAS(sitem)->siz + 3;
chip_input = &(DATAW(DATAS(sitem)->witems[i])->chip_input);
if (babinfo->chip_conf[i])
bab_add_data(sitem, BAB_INP_ADDR, (uint8_t *)chip_input, sizeof(*chip_input));
chip_siz = DATAS(sitem)->siz - babinfo->chip_conf[i];
if (chip_siz < BAB_CHIP_MIN)
BAB_ADD_NOOPs(sitem, BAB_CHIP_MIN - chip_siz);
BAB_ADD_ASYNC(sitem);
}
DATAS(sitem)->chip_off[i] = DATAS(sitem)->siz;
DATAS(sitem)->bank_off[bank] = DATAS(sitem)->siz;
K_WLOCK(babinfo->spi_list);
k_add_head(babinfo->spi_list, sitem);
K_WUNLOCK(babinfo->spi_list);
cgsem_post(&(babinfo->spi_work));
}
static bool bab_get(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, struct timeval *when)
{
K_ITEM *item;
bool delayed;
int i;
item = NULL;
delayed = false;
while (item == NULL) {
cgsem_mswait(&(babinfo->spi_reply), babinfo->reply_wait);
K_WLOCK(babinfo->spi_sent);
item = k_unlink_tail(babinfo->spi_sent);
K_WUNLOCK(babinfo->spi_sent);
if (!item) {
if (!delayed) {
applog(LOG_WARNING, "%s%d: Delay getting work reply ...",
babcgpu->drv->name,
babcgpu->device_id);
delayed = true;
babinfo->reply_waits++;
}
}
}
for (i = 0; i < babinfo->chips; i++) {
if (babinfo->chip_conf[i] & 0x7f) {
memcpy((void *)&(babinfo->chip_results[i]),
(void *)(DATAS(item)->rbuf + DATAS(item)->chip_off[i]),
sizeof(babinfo->chip_results[0]));
}
}
// work_start is also the time the results were read
memcpy(when, &(DATAS(item)->work_start), sizeof(*when));
K_WLOCK(babinfo->sfree_list);
k_add_head(babinfo->sfree_list, item);
K_WUNLOCK(babinfo->sfree_list);