@@ -167,19 +167,25 @@ void RA_Init(HWND hWnd)
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extern uint8_t gbReadMemory (uint16_t address);
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extern void gbWriteMemory (uint16_t address, uint8_t value);
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+ extern uint8_t * gbMemoryMap[16 ];
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// GB/GBC Basic byte reader/writer
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- static unsigned char ByteReader (unsigned int nOffs) { return gbReadMemory ( nOffs) ; }
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- static void ByteWriter (unsigned int nOffs, unsigned char nVal) { gbWriteMemory ( nOffs, nVal) ; }
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+ static unsigned char ByteReader (unsigned int nOffs) { return gbMemoryMap[ nOffs >> 12 ][nOffs & 0x0fff ] ; }
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+ static void ByteWriter (unsigned int nOffs, unsigned char nVal) { gbMemoryMap[ nOffs >> 12 ][nOffs & 0x0fff ] = nVal; }
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- // GBC Byte reader/writer offset by the size of the map until the end of the work RAM
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- static unsigned char PostRAMByteReader (unsigned int nOffs) { return gbReadMemory (nOffs + 0xE000 ); }
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+ // GB/GBC Byte reader/writer offset by the size of the map until the end of the work RAM
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+ static unsigned char PostRAMByteReader (unsigned int nOffs)
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+ {
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+ if (nOffs >= 0x1F03 && nOffs <= 0x1F0E )
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+ {
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+ // prevents "Undocumented memory register read" message
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+ if (nOffs == 0x1F03 || nOffs >= 0x1F08 )
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+ return 0xFF ;
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+ }
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+ return gbReadMemory (nOffs + 0xE000 );
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+ }
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static void PostRAMByteWriter (unsigned int nOffs, unsigned char nVal) { gbWriteMemory (nOffs + 0xE000 , nVal); }
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- // GBC RAM reader/writer targeting the first bank on work RAM
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- static unsigned char GBCFirstRAMBankReader (unsigned int nOffs) { return gbWram ? gbWram[nOffs + 0x1000 ] : 0 ; }
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- static void GBCFirstRAMBankWriter (unsigned int nOffs, unsigned char nVal) { if (gbWram) gbWram[nOffs + 0x1000 ] = nVal; }
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-
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// GBC RAM reader/writer targeting work RAM banks 2-7
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static unsigned char GBCBankedRAMReader (unsigned int nOffs) { return gbWram ? gbWram[nOffs + 0x2000 ] : 0 ; }
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static void GBCBankedRAMWriter (unsigned int nOffs, unsigned char nVal) { if (gbWram) gbWram[nOffs + 0x2000 ] = nVal; }
@@ -200,18 +206,18 @@ void RA_OnLoadNewRom(ConsoleID nConsole, uint8_t* rom, size_t size, const char*
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switch (nConsole)
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{
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case GB:
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- RA_InstallMemoryBank (0 , ByteReader, ByteWriter, 0x10000 );
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+ RA_InstallMemoryBank (0 , ByteReader, ByteWriter, 0xE000 ); // Direct mapping ($0000-$DFFF)
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+ RA_InstallMemoryBank (1 , PostRAMByteReader, PostRAMByteWriter, 0x2000 ); // Echo RAM + controller registers ($E000-$FFFF)
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break ;
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case GBC:
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// GBC has a weird quirk where the memory from $D000-$DFFF is a virtual block of memory pointing at one of the work RAM banks.
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// Bits 0-2 of $FF70 indicate which bank is currently accessible to the program in the $D000-$DFFF range.
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// Since that makes it hard to work with the memory in that region when building/running achievements, the memory exposed to
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// the achievements in $D000-$DFFF is always the first bank. The remaining banks are exposed in virtual memory above $10000.
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- RA_InstallMemoryBank (0 , ByteReader, ByteWriter, 0xD000 ); // Direct mapping ($0000-$CFFF)
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- RA_InstallMemoryBank (1 , GBCFirstRAMBankReader, GBCFirstRAMBankWriter, 0x1000 ); // First bank ($D000-$DFFF)
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- RA_InstallMemoryBank (2 , PostRAMByteReader, PostRAMByteWriter, 0x2000 ); // Direct mapping ($E000-$FFFF)
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- RA_InstallMemoryBank (3 , GBCBankedRAMReader, GBCBankedRAMWriter, 0x6000 ); // RAM banks 2-7 ($10000-$15FFF)
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+ RA_InstallMemoryBank (0 , ByteReader, ByteWriter, 0xE000 ); // Direct mapping ($0000-$DFFF)
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+ RA_InstallMemoryBank (1 , PostRAMByteReader, PostRAMByteWriter, 0x2000 ); // Echo RAM + controller registers ($E000-$FFFF)
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+ RA_InstallMemoryBank (2 , GBCBankedRAMReader, GBCBankedRAMWriter, 0x6000 ); // RAM banks 2-7 ($10000-$15FFF)
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break ;
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case GBA:
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