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Commit ca837e1

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author
Railstars
committedJun 29, 2011
Initial commit; code compiles, but does little (only direct mode byte write implemented) and is utterly untested (yet).
1 parent 8829e40 commit ca837e1

7 files changed

+708
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‎DCCServiceModePacket.cpp

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#include "DCCServiceModePacket.h"
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DCCServiceModePacket::DCCServiceModePacket(): _size_repeat(0x40) //size(1), repeat(0)
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{
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_data[0] = 0xFF; //default to idle packet
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_data[1] = 0x00;
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}
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uint8_t DCCServiceModePacket::getBitstream(uint8_t rawuint8_ts[]) //returns size of array.
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{
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uint8_t i;
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uint8_t XOR = 0;
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for(i = 0; i < (_size_repeat>>6); ++i)
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{
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rawuint8_ts[i] = _data[i];
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XOR ^= _data[i];
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}
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rawuint8_ts[i] = XOR;
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return i;
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}
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uint8_t DCCServiceModePacket::getSize(void)
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{
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return (_size_repeat>>6);
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}
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void DCCServiceModePacket::setData(uint8_t value)
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{
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_data[0] = value;
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_size_repeat = (_size_repeat & 0x3F) | (1<<6);
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}
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void DCCServiceModePacket::setData(uint8_t value1, uint8_t value2)
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{
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_data[0] = value1;
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_data[1] = value2;
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_size_repeat = (_size_repeat & 0x3F) | (2<<6);
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}
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void DCCServiceModePacket::setData(uint8_t value1, uint8_t value2, uint8_t value3)
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{
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_data[0] = value1;
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_data[1] = value2;
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_data[2] = value3;
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_size_repeat = (_size_repeat & 0x3F) | (3<<6);
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}
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void DCCServiceModePacket::makeReset(void)
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{
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_data[0] = 0;
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_data[1] = 0;
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_size_repeat = (2<<6);
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}

‎DCCServiceModePacket.h

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#ifndef __DCCSERVICEMODEPACKET_H__
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#define __DCCSERVICEMODEPACKET_H__
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#include "WProgram.h"
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typedef unsigned char byte;
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class DCCServiceModePacket
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{
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public:
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DCCServiceModePacket();
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uint8_t getBitstream(byte rawbytes[]); //returns size of array.
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uint8_t getSize(void);
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void setData(uint8_t value);
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void setData(uint8_t value1, uint8_t value2);
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void setData(uint8_t value1, uint8_t value2, uint8_t value3);
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inline void setRepeat(byte new_repeat) { _size_repeat = (_size_repeat&0xC0 | new_repeat&0x3F) ;}
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inline uint8_t getRepeat(void) { return _size_repeat & 0x3F; }//return repeat; }
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void makeReset(void);
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private:
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//A DCC service mode packet is at most 4 bytes: 3 of data, one of XOR
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byte _data[4];
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byte _size_repeat; //a bit field! 0b11000000 = 0xC0 = size; 0x00111111 = 0x3F = repeat
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};
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#endif //__DCCSERVICEMODEPACKET_H__

‎DCCServiceModeQueue.cpp

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#include "DCCServiceModeQueue.h"
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DCCServiceModeQueue::DCCServiceModeQueue(void) : _read_pos(0), _size(0)
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{
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return;
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}
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void DCCServiceModeQueue::setup(void)
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{
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// for(uint8_t i = 0; i<QUEUE_SIZE; ++i)
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// {
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// _queue[i].setup();
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// }
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}
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bool DCCServiceModeQueue::insertPacket(DCCServiceModePacket &packet)
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{
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if(_size == QUEUE_SIZE) //queue is already full!
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return false;
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if(!packet.getRepeat()) //zero repeat set
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return false;
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memcpy(&_queue[_size],&packet,sizeof(DCCServiceModePacket));
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++_size;
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return true;
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}
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// void DCCServiceModeQueue::printQueue(void)
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// {
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// byte i, j;
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// for(i = 0; i < size; ++i)
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// {
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// for(j = 0; j < (queue[i].size_repeat>>4); ++j)
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// {
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// Serial.print(queue[i].data[j],BIN);
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// Serial.print(" ");
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// }
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// if(i == _read_pos) Serial.println(" r");
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// else if(i == write_pos) Serial.println(" w");
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// else Serial.println("");
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// }
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// }
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/* Goes through each packet in the queue, repeats it getRepeat() times, and discards it */
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bool DCCServiceModeQueue::readPacket(DCCServiceModePacket &packet)
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{
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if(isEmpty())
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return false;
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if(_queue[_read_pos].getRepeat()) //if the topmost packet needs repeating
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{
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_queue[_read_pos].setRepeat(_queue[_read_pos].getRepeat()-1); //decrement the current packet's repeat count
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}
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else //the topmost packet is ready to be discarded; use the DCCServiceModeQueue mechanism
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{
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++_read_pos;
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}
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if(!isEmpty()) //anything remaining in the queue?
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{
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memcpy(&packet,&_queue[_read_pos],sizeof(DCCServiceModePacket));
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return true;
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}
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return false;
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}

‎DCCServiceModeQueue.h

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#ifndef __DCCSERVICEMODEQUEUE_H__
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#define __DCCSERVICEMODEQUEUE_H__
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#include "WProgram.h"
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/**
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* A FIFO queue for holding DCC service mode packets.
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* Copyright 2011 D.E. Goodman-Wilson
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**/
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#include "DCCServiceModePacket.h"
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#define QUEUE_SIZE 5 //TODO!!
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class DCCServiceModeQueue
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{
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private:
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DCCServiceModePacket _queue[QUEUE_SIZE]; //TODO!!
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byte _read_pos;
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byte _size;
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public:
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DCCServiceModeQueue(void);
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void setup(void);
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void clear(void) {_read_pos = _size = 0;}
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bool isEmpty(void) {return _read_pos == _size;}
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virtual bool insertPacket(DCCServiceModePacket &packet); //makes a local copy, does not take over memory management!
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virtual bool readPacket(DCCServiceModePacket &packet); //does not hand off memory management of packet. used immediately.
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};
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#endif //__DCCSERVICEMODEQUEUE_H__

‎DCCServiceModeScheduler.cpp

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#include "DCCServiceModeScheduler.h"
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/*
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* DCC Service Mode Waveform Generator
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*
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*
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* Hardware requirements:
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* *An h-bridge with inputs wired as indicated below, and outputs to a programming track.
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* *A current sensor on the h-bridge, wired to the analog input as below.
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* *A locomotive with a decoder installed, reset to factory defaults.
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*
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* Author: D.E. Goodman-Wilson dgoodman@railstars.com
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* Website: http://railstars.com/software/PrgmrArduino/
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*
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* Copyright 2011 Don Goodman-Wilson
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/*****************************************************************/
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///An enumerated type for keeping track of the state machine used in the timer2 ISR
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enum DCC_output_state_t {
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dos_idle,
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dos_send_preamble,
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dos_send_bstart,
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dos_send_byte,
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dos_end_bit
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};
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DCC_output_state_t DCC_state = dos_idle; //just to start out
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#define PREAMBLE_LENGTH 20 //at least 20 '1's in a service mode preamble.
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#define ACK_TIMEOUT 5 //6ms +- 1ms
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//TODO
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/// The currently queued packet to be put on the rails.
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byte current_packet[6] = {0x00,0x00,0x00,0x00,0x00,0x00};
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/// How many data bytes in the queued packet?
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volatile byte current_packet_size = 0;
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/// How many bytes remain to be put on the rails?
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volatile byte current_byte_counter = 0;
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/// How many bits remain in the current data byte/preamble before changing states?
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volatile byte current_bit_counter = PREAMBLE_LENGTH; //init to 28 1's for the preamble
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/// A fixed-content packet to send when idle
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//byte DCC_Idle_Packet[3] = {255,0,255};
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/// A fixed-content packet to send to reset all decoders on layout
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//byte DCC_Reset_Packet[3] = {0,0,0};
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/** S 9.1 A specifies that '1's are represented by a square wave with a half-period of 58us (valid range: 55-61us)
65+
and '0's with a half-period of >100us (valid range: 95-9900us)
66+
Because '0's are stretched to provide DC power to non-DCC locos, we need two zero counters,
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one for the top half, and one for the bottom half.
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Here is how to calculate the timer1 counter values (from ATMega328 datasheet, chapter 17.7.2):
70+
f_{OC2A} = \frac{f_{clk_I/O}}{2*N*(1+OCR2A)})
71+
where N = prescalar, and OCR2A is the TOP we need to calculate.
72+
We know the desired half period for each case, 58us and >100us.
73+
So:
74+
for ones:
75+
58us = (8*(1+OCR2A)) / (16MHz)
76+
58us * 16MHz = 8*(1+OCR2A)
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58us * 2MHz = 1+OCR2A
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OCR2A = 115
79+
80+
for zeros:
81+
100us * 2MHz = 1+OCR2A
82+
OCR2A = 199
83+
*/
84+
unsigned int one_count=115; //58us
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unsigned int zero_count=199; //100us
86+
87+
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/** On ATmega168 and ATmega328, we will use the 8-bit Timer2.
89+
But because the AT90CAN128 does not offer an OC2B pin (!?), even though the ATmega2560 does,
90+
we will use the 16-bit Timer3 on these chips. TODO
91+
*/
92+
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/// Setup phase: configure and enable Timer2/ CTC interrupt, set OC2A and OC2B to toggle on CTC
94+
void setup_DCC_service_mode_waveform_generator()
95+
{
96+
97+
//Set the OC2A and OC2B pins (Timer2 output pins A and B) to output mode
98+
//On Arduino UNO, etc, OC2A is Port B/Pin 3 = digital pin 11; and OC2B Port D/Pin 3 = digital pin 3
99+
#if defined(__AVR_ATmega48__) || defined(__AVR_ATmega88__) || defined(__AVR_ATmega168__) || defined(__AVR_ATmega328__)
100+
DDRB |= _BV(DDB3);
101+
DDRD |= _BV(DDD3);
102+
#endif
103+
104+
// Configure Timer2 in CTC mode, for waveform generation, set to toggle OC2A, OC2B, at /8 prescalar, interrupt at CTC
105+
TCCR2A = _BV(COM2A0) | _BV(COM2B0) | _BV(WGM21);
106+
TCCR2B = _BV(CS21);
107+
108+
// start by outputting a '1'
109+
OCR2A = OCR2B = one_count; //Whenever we set OCR2A, we must also set OCR2B, or else pin OC2B will get out of sync with OC2A!
110+
TCNT2 = 0; //get the timer rolling (not really necessary? defaults to 0. Just in case.)
111+
112+
//finally, force a toggle on OC2A so that pin OC2A will always complement pin OC2B
113+
TCCR2B |= _BV(FOC2A);
114+
115+
}
116+
117+
void DCC_service_mode_waveform_generation_hajime()
118+
{
119+
//force a toggle on OC2A so that pin OC2A will always complement pin OC2B
120+
TCCR2B |= _BV(FOC2A);
121+
//enable the compare match interrupt
122+
TIMSK2 |= _BV(OCIE2A);
123+
}
124+
125+
void DCC_service_mode_waveform_generation_yame()
126+
{
127+
//disable the compare match interrupt
128+
TIMSK2 &= ~_BV(OCIE2A);
129+
//set both outputs to zero to disable H-Bridge
130+
#if defined(__AVR_ATmega48__) || defined(__AVR_ATmega88__) || defined(__AVR_ATmega168__) || defined(__AVR_ATmega328__)
131+
PINB &= ~_BV(PINB3);
132+
PIND &= ~_BV(PIND3);
133+
#endif
134+
}
135+
136+
/// This is the Interrupt Service Routine (ISR) for Timer1 compare match on output A. We don't worry about the interrupt on output B, since we want B to mirror A; we'll update them both here.
137+
ISR(TIMER2_COMPA_vect)
138+
{
139+
//in CTC mode, timer TCINT2 automatically resets to 0 when it matches OCR2A. Depending on the next bit to output,
140+
//we may have to alter the value in OCR2A, maybe.
141+
//to switch between "one" waveform and "zero" waveform, we assign a value to OCR2A.
142+
143+
//remember, anything we set for OCR2A takes effect IMMEDIATELY, so we are working within the cycle we are setting.
144+
//first, check to see if we're in the second half of a byte; only act on the first half of a byte
145+
//On Arduino UNO, etc, OC2A is digital pin 11, or Port B/Pin 3
146+
if(!(PINB & _BV(PINB3))) //if the pin is high, time to do our work setting up whether this should be a zero or one.
147+
{
148+
//time to switch things up, maybe. send the current bit in the current packet.
149+
//if this is the last bit to send, queue up another packet (might be the idle packet).
150+
switch(DCC_state)
151+
{
152+
/// Idle: Check if a new packet is ready. If it is, fall through to dos_send_premable. Otherwise just stick a '1' out there.
153+
case dos_idle:
154+
if(!current_byte_counter) //if no new packet
155+
{
156+
// Serial.println("X");
157+
OCR2A = OCR2B = one_count; //just send ones if we don't know what else to do. safe bet.
158+
break;
159+
}
160+
//looks like there's a new packet for us to dump on the wire!
161+
//for debugging purposes, let's print it out
162+
// if(current_packet[1] != 0xFF)
163+
// {
164+
// Serial.print("Packet: ");
165+
// for(byte j = 0; j < current_packet_size; ++j)
166+
// {
167+
// Serial.print(current_packet[j],HEX);
168+
// Serial.print(" ");
169+
// }
170+
// Serial.println("");
171+
// }
172+
DCC_state = dos_send_preamble; //and fall through to dos_send_preamble
173+
/// Preamble: In the process of producing 14 '1's, counter by current_bit_counter; when complete, move to dos_send_bstart
174+
case dos_send_preamble:
175+
OCR2A = OCR2B = one_count;
176+
// Serial.print("P");
177+
if(!--current_bit_counter)
178+
DCC_state = dos_send_bstart;
179+
break;
180+
/// About to send a data byte, but have to peceed the data with a '0'. Send that '0', then move to dos_send_byte
181+
case dos_send_bstart:
182+
OCR2A = OCR2B = zero_count;
183+
DCC_state = dos_send_byte;
184+
current_bit_counter = 8;
185+
// Serial.print(" 0 ");
186+
break;
187+
/// Sending a data byte; current bit is tracked with current_bit_counter, and current byte with current_byte_counter
188+
case dos_send_byte:
189+
if(((current_packet[current_packet_size-current_byte_counter])>>(current_bit_counter-1)) & 1) //is current bit a '1'?
190+
{
191+
OCR2A = OCR2B = one_count;
192+
// Serial.print("1");
193+
}
194+
else //or is it a '0'
195+
{
196+
OCR2A = OCR2B = zero_count;
197+
// Serial.print("0");
198+
}
199+
if(!--current_bit_counter) //out of bits! time to either send a new byte, or end the packet
200+
{
201+
if(!--current_byte_counter) //if not more bytes, move to dos_end_bit
202+
{
203+
DCC_state = dos_end_bit;
204+
}
205+
else //there are more bytes…so, go back to dos_send_bstart
206+
{
207+
DCC_state = dos_send_bstart;
208+
}
209+
}
210+
break;
211+
/// Done with the packet. Send out a final '1', then head back to dos_idle to check for a new packet.
212+
case dos_end_bit:
213+
OCR2A = OCR2B = one_count;
214+
DCC_state = dos_idle;
215+
current_bit_counter = PREAMBLE_LENGTH; //in preparation for a premable...
216+
// Serial.println(" 1");
217+
break;
218+
}
219+
}
220+
}
221+
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///////////////////////////////////////////////
223+
///////////////////////////////////////////////
224+
///////////////////////////////////////////////
225+
226+
DCCServiceModeScheduler::DCCServiceModeScheduler(void) : _accepts_direct_mode(false), _mode(idle_mode), _wasACKd(false), _over_current_timer(0), _ack_timer(0)
227+
{
228+
_mode = idle_mode;
229+
_wasACKd = false;
230+
_power_on_queue.setup();
231+
_instruction_queue.setup();
232+
_conditional_queue.setup();
233+
_over_current_timer = 0;
234+
_ack_timer = 0;
235+
}
236+
237+
void DCCServiceModeScheduler::reset(void)
238+
{
239+
_mode = idle_mode;
240+
_wasACKd = false;
241+
_power_on_queue.clear();
242+
_instruction_queue.clear();
243+
_conditional_queue.clear();
244+
_over_current_timer = 0;
245+
_ack_timer = 0;
246+
}
247+
248+
void DCCServiceModeScheduler::setup(void) //for any post-constructor initialization
249+
{
250+
setup_DCC_service_mode_waveform_generator();
251+
}
252+
253+
//to be called periodically within loop()
254+
//TODO This function is pretty much a mess! clean this up once we have a better idea of what we're doing.
255+
256+
//modes:
257+
// power-on: 20+ packets to permit decoder to power on. A load of 250mA sustained after 100ms = short circuit.
258+
// instruction transmit:
259+
// wait for ack: watch for an increase in current draw (at least 60mA) for TODO ms to count as ACK
260+
// else timeout at end of packet queue and register as NAK
261+
// power-off:
262+
//
263+
264+
void DCCServiceModeScheduler::update(void) //checks queues, puts whatever's pending on the rails via global current_packet. easy-peasy
265+
{
266+
267+
//first, check for an over-current; abort current operation if detected.
268+
if(_over_current_timer) //if the timer is started
269+
{
270+
uint16_t check = analogRead(CURRENT_SENSE_PIN);
271+
uint16_t time = millis();
272+
if( (check >= OVER_CURRENT_VALUE) && ( (time - _over_current_timer) >= 100) )
273+
{
274+
//over current detected! shut it down!
275+
DCC_service_mode_waveform_generation_yame();
276+
_mode = idle_mode;
277+
_power_on_queue.clear();
278+
_instruction_queue.clear();
279+
_conditional_queue.clear();
280+
_over_current_timer = 0;
281+
return;
282+
}
283+
}
284+
285+
286+
if(_mode == idle_mode)
287+
return;
288+
289+
//Feed me! The ISR needs a packet!
290+
if(!current_byte_counter)
291+
{
292+
//now, queue up the next packet
293+
DCCServiceModePacket p = DCCServiceModePacket();
294+
295+
switch(_mode)
296+
{
297+
case power_on_initial_mode:
298+
//turn on the h-bridge
299+
//start the over-current timer
300+
_wasACKd = false; //reset ack
301+
_over_current_timer = millis();
302+
DCC_service_mode_waveform_generation_hajime();
303+
_mode = power_on_mode;
304+
//no break
305+
case power_on_mode:
306+
if(!_power_on_queue.readPacket(p))
307+
{
308+
_instruction_queue.readPacket(p);
309+
_mode = recovery_mode;
310+
}
311+
break;
312+
313+
case recovery_mode:
314+
//need to watch for an ack from here forward!
315+
uint16_t check = analogRead(CURRENT_SENSE_PIN);
316+
uint16_t time = millis();
317+
if(check >= ACK_THRESHOLD)
318+
{
319+
//check/start the timer
320+
if(_ack_timer)
321+
{
322+
if( (time - _ack_timer) >= ACK_TIMEOUT )
323+
{
324+
//got an ack!! What to do with it!?
325+
reset();
326+
_wasACKd = true;
327+
return;
328+
}
329+
}
330+
}
331+
if(!_instruction_queue.readPacket(p))
332+
{
333+
//done with sequence. power off and reset.
334+
DCC_service_mode_waveform_generation_yame();
335+
reset();
336+
return;
337+
}
338+
break;
339+
}
340+
341+
//feed the ISR:
342+
current_packet_size = p.getBitstream(current_packet); //feed to the starving ISR.
343+
current_byte_counter = current_packet_size;
344+
}
345+
}
346+
347+
348+
/** Here's the general gist of how we're going to write a CV (or part thereof):
349+
set up the repeat queue with the necessary packets for the mode, operation, CV, and value
350+
set a flag to indicate how many packets should pass before we start watching for an ack
351+
allow repeat() to run...
352+
when the indicated number of packets begin to pass, watch for an ACK. Will need a pin change
353+
interrupt on one of the analog pins, and a timer? use millis().
354+
if ACK received, shut down programming track
355+
if no ack received by the time we run out of packets to send, count as NAK
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Will use a similar procedure for verifying a CV.
357+
**/
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bool DCCServiceModeScheduler::directModeWriteByte(uint16_t CV, uint8_t value)
360+
{
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//Packet stream:
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// power-on (see above)
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// 3 or more reset packets
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// 5 or more writes to a single CV
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// 6 or more identical write or reset packets (decoder recovery time)
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// power off
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368+
DCCServiceModePacket p;
369+
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//first, check to see if something is currently being put on the rails.
371+
if(_mode != idle_mode)
372+
return false;
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374+
// load up 20 idle packets for power-on
375+
p.setRepeat(20);
376+
_power_on_queue.insertPacket(p); //p defaults to idle packet, no need to set it up.
377+
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// load up 3 or more reset packets
379+
p.makeReset();
380+
_power_on_queue.insertPacket(p);
381+
382+
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//Instructions packets using Direct CV Addressing are 4 byte packets of the format:
384+
// long-preamble 0 011111AA 0 AAAAAAAA 0 DDDDDDDD 0 EEEEEEEE 1
385+
p.setData( (0b01111100 | ((CV>>8)&0x03)), CV&0xFF, value);
386+
p.setRepeat(5);
387+
_instruction_queue.insertPacket(p);
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//and send one or more reset packets if an ack is found. Ugh.
390+
p.makeReset();
391+
p.setRepeat(6);
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_instruction_queue.insertPacket(p);
393+
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_mode = power_on_initial_mode;
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return true;
397+
}

‎DCCServiceModeScheduler.h

+95
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,95 @@
1+
#ifndef __DCCSERVICEMODESCHEDULER_H__
2+
#define __DCCSERVICEMODESCHEDULER_H__
3+
#include "DCCServiceModePacket.h"
4+
#include "DCCServiceModeQueue.h"
5+
#include "WProgram.h"
6+
#include <avr/io.h>
7+
#include <avr/interrupt.h>
8+
9+
#ifndef CURRENT_SENSE_PIN
10+
#define CURRENT_SENSE_PIN 3
11+
#endif
12+
13+
#ifndef OVER_CURRENT_VALUE
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#define OVER_CURRENT_VALUE 200
15+
#endif
16+
17+
#ifndef ACK_THRESHOLD
18+
#define ACK_THRESHOLD 100
19+
#endif
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21+
enum physical_register_t
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{
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address_register,
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start_voltage_register,
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acceleration_register,
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deceleration_register,
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basic_configuration_register,
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reserved_register,
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version_number_register,
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manufacturer_ID_register
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};
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enum programmer_mode_t
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{
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idle_mode,
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power_on_initial_mode,
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power_on_mode,
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recovery_mode
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};
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class DCCServiceModeScheduler
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{
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public:
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DCCServiceModeScheduler(void);
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// bool writeByte(uint16_t CV, uint8_t value);
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// uint8_t readByte(uint16_t CV);
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// bool writeAddress(uint_16t address);
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// uint_16t readAddress();
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// bool hardReset(void); //reset decoder to factory state.
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void setup(void); //for any post-constructor initialization
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//to be called periodically within loop()
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void update(void);
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//reset software
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void reset(void);
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61+
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bool checkACK(void) {return _wasACKd;}
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// bool checkSupportDirectMode(void);
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bool directModeWriteByte(uint16_t CV, uint8_t value);
67+
// bool directModeVerifyByte(uint16_t CV, uint8_t value);
68+
// bool directModeWriteBit(uint16_t CV, uint8_t bit, uint8_t value);
69+
// bool directModeVerifyBit(uint16_t CV, uint8_t bit, uint8_t value);
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71+
// bool addressOnlyModeWriteAddress(uint8_t address);
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// bool addressOnlyModeVerifyAddress(uint8_t address);
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// bool physicalRegsiterModeWriteByte(physical_register_t register, uint8_t value);
75+
// bool physicalRegsiterModeVerifyByte(physical_register_t register, uint8_t value);
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// bool pagedRegisterModeWriteByte(uint16_t CV, uint8_t value);
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// bool pagedRegisterModeVerifyByte(uint16_t CV, uint8_t value);
79+
80+
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private:
82+
83+
bool _accepts_direct_mode;
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bool _tested_direct_mode;
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bool _wasACKd;
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programmer_mode_t _mode;
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uint16_t _over_current_timer;
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uint16_t _ack_timer;
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DCCServiceModeQueue _power_on_queue;
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DCCServiceModeQueue _instruction_queue;
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DCCServiceModeQueue _conditional_queue;
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};
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94+
95+
#endif //__DCCSERVICEMODESCHEDULER_H__

‎examples/ProgrammerTest/ProgrammerTest.pde

+30
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
#include <DCCServiceModePacket.h>
2+
#include <DCCServiceModeQueue.h>
3+
#include <DCCServiceModeScheduler.h>
4+
5+
/********************
6+
* Creates a minimum DCC command station from a potentiometer connected to analog pin 0,
7+
* and a button connected to ground on one end and digital pin 4 on the other end. See this link
8+
* http://www.arduino.cc/en/Tutorial/AnalogInput
9+
* The DCC waveform is output on Pin 9, and is suitable for connection to an LMD18200-based booster directly,
10+
* or to a single-ended-to-differential driver, to connect with most other kinds of boosters.
11+
********************/
12+
13+
DCCServiceModeScheduler dps;
14+
15+
void setup()
16+
{
17+
Serial.begin(115200);
18+
Serial.println("Hello!");
19+
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dps.setup();
21+
22+
////////
23+
24+
dps.directModeWriteByte(29,6); //a safe value for CV 29
25+
}
26+
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void loop()
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{
29+
dps.update();
30+
}

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